1# Copyright 2021 The Chromium OS Authors
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    ST STM32 family USB Type-C / Power Delivery. The default values were
6    taken from the LL_UCPD_StructInit function defined in the HAL.
7
8compatible: "st,stm32-ucpd"
9
10include: [base.yaml, pinctrl-device.yaml]
11
12properties:
13  reg:
14    required: true
15
16  clocks:
17    required: true
18
19  interrupts:
20    required: true
21
22  psc-ucpdclk:
23    default: 2
24    type: int
25    enum:
26      - 1
27      - 2
28      - 4
29      - 8
30      - 16
31      - 32
32      - 64
33      - 128
34    description: |
35      Determines the division ratio of a kernel clock pre-scaler
36      producing UCPD peripheral clock (ucpd_clk). It is recommended
37      to use the pre-scaler so as to set the ucpd_clk frequency in
38      the range from 6 to 9 MHz.
39
40  ifrgap:
41    type: int
42    default: 17
43    description: |
44      Determines the division ratio of a ucpd_clk divider producing
45      inter-frame gap timer clock (tInterFrameGap).
46      The division ratio 15 is to apply for Tx clock at the USB PD 2.0
47      specification nominal value.
48      Valid range: 2 - 32
49
50  transwin:
51    type: int
52    default: 8
53    description: |
54      Determines the division ratio of a hbit_clk divider producing
55      tTransitionWindow interval.
56      Valid range: 2 - 32
57
58  hbitclkdiv:
59    type: int
60    default: 14
61    description: |
62      Determines the division ratio of a ucpd_clk divider producing
63      half-bit clock (hbit_clk)
64      Valid range: 1 - 64
65
66  dead-battery:
67    type: boolean
68    description: |
69      Determine if USB-C Dead Battery pull-down's should be
70      applied to the CC lines.
71
72  pinctrl-0:
73    required: true
74
75  pinctrl-names:
76    required: true
77