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/Zephyr-latest/dts/bindings/clock/
Dnuvoton,numaker-scc.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nuvoton,numaker-scc"
8 include: [clock-controller.yaml, base.yaml]
19 - "untouched"
20 - "enable"
21 - "disable"
26 Enable/disable 32.768 kHz low-speed external crystal oscillator (LXT)
28 - "untouched"
29 - "enable"
30 - "disable"
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/Zephyr-latest/drivers/ethernet/phy/
Dphy_adin2111.c5 * SPDX-License-Identifier: Apache-2.0
32 /* PHY's software powerdown check retry delay */
34 /* Number of retries for PHY's software powerdown check */
56 * - RM mask 0x6FFF
57 * - ADI driver example mask 0x2BFF
73 /* Software Power-down Control Register */
77 /* Software Power-down Status */
112 const struct phy_adin2111_config *const cfg = dev->config; in phy_adin2111_c22_read()
114 return mdio_read(cfg->mdio, cfg->phy_addr, reg, val); in phy_adin2111_c22_read()
120 const struct phy_adin2111_config *const cfg = dev->config; in phy_adin2111_c22_write()
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/Zephyr-latest/drivers/sensor/tdk/mpu9250/
Dak8963.c4 * SPDX-License-Identifier: Apache-2.0
72 /* The sensor device returns 10^-9 Teslas after scaling. in ak8963_convert_magn()
80 return -EOVERFLOW; in ak8963_convert_magn()
85 val->val1 = scaled_val / 1000000; in ak8963_convert_magn()
86 val->val2 = scaled_val % 1000000; in ak8963_convert_magn()
96 const struct mpu9250_config *cfg = dev->config; in ak8963_execute_rw()
106 ret = i2c_reg_write_byte_dt(&cfg->i2c, in ak8963_execute_rw()
115 ret = i2c_reg_write_byte_dt(&cfg->i2c, in ak8963_execute_rw()
124 ret = i2c_reg_write_byte_dt(&cfg->i2c, in ak8963_execute_rw()
134 ret = i2c_reg_read_byte_dt(&cfg->i2c, in ak8963_execute_rw()
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/Zephyr-latest/boards/adi/max32655fthr/doc/
Dindex.rst6 ultra low-power wireless solutions using MAX32655 Arm© Cortex®-M4F and Bluetooth® 5.2 Low Energy (L…
8 The form factor is a small 0.9in x 2.6in dual-row header footprint that is compatible
12 The MAX32655FTHR provides a power-optimized flexible platform for quick proof-of-concepts and
34 - MAX32655 MCU:
36 - Ultra-Low-Power Wireless Microcontroller
37 - Internal 100MHz Oscillator
38 - Flexible Low-Power Modes with 7.3728MHz System Clock Option
39 - 512KB Flash and 128KB SRAM (Optional ECC on One 32KB SRAM Bank)
40 - 16KB Instruction Cache
41 - Bluetooth 5.2 LE Radio
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/Zephyr-latest/soc/nxp/lpc/lpc55xxx/
Dsoc.c1 /* Copyright 2017, 2019-2023 NXP
3 * SPDX-License-Identifier: Apache-2.0
10 * This module provides routines to initialize and support board-level
103 SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK; in clock_init()
104 ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK; in clock_init()
116 * since the non-secure SOCs should not have access to the flash in clock_init()
223 SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_FRO1MHZ_CLK_ENA_MASK; in clock_init()
248 * According to reference mannual, device mode setting has to be set by access in clock_init()
251 USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; in clock_init()
266 /* Put PHY powerdown under software control */ in clock_init()
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/Zephyr-latest/drivers/ethernet/
Deth_numaker.c4 * SPDX-License-Identifier: Apache-2.0
64 /* Delay execution for given amount of ticks for SDK-HAL */
74 synopGMAC_write_phy_reg((u32 *)gmacdev->MacBase, addr, reg, data); in mdio_write()
81 synopGMAC_read_phy_reg((u32 *)gmacdev->MacBase, addr, reg, &data); in mdio_read()
108 return -EIO; in reset_phy()
116 gmacdev->LinkState = LINKUP; in reset_phy()
119 gmacdev->LinkState = LINKDOWN; in reset_phy()
121 return -EIO; in reset_phy()
134 synopGMAC_set_mode(NUMAKER_GMAC_INTF, 1); /* Set mode 1: 100Mbps; 2: 10Mbps */ in reset_phy()
135 return -EIO; in reset_phy()
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Deth_adin2111.c4 * SPDX-License-Identifier: Apache-2.0
86 return -EBUSY; in eth_adin2111_mac_reset()
111 struct adin2111_data *ctx = dev->data; in eth_adin2111_get_iface()
113 return ((struct adin2111_port_data *)ctx->port[port_idx]->data)->iface; in eth_adin2111_get_iface()
118 struct adin2111_data *ctx = dev->data; in eth_adin2111_lock()
120 return k_mutex_lock(&ctx->lock, timeout); in eth_adin2111_lock()
125 struct adin2111_data *ctx = dev->data; in eth_adin2111_unlock()
127 return k_mutex_unlock(&ctx->lock); in eth_adin2111_unlock()
145 const struct adin2111_config *cfg = dev->config; in eth_adin2111_oa_spi_xfer()
163 ret = spi_transceive_dt(&cfg->spi, &tx, &rx); in eth_adin2111_oa_spi_xfer()
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/Zephyr-latest/dts/arm/nuvoton/
Dm2l31x.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
10 #include <zephyr/dt-bindings/clock/numaker_m2l31x_clock.h>
11 #include <zephyr/dt-bindings/reset/numaker_m2l31x_reset.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
18 zephyr,flash-controller = &rmc;
26 #address-cells = <1>;
27 #size-cells = <0>;
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Dm46x.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/pinctrl/numaker-m46x-pinctrl.h>
10 #include <zephyr/dt-bindings/clock/numaker_m46x_clock.h>
11 #include <zephyr/dt-bindings/reset/numaker_m46x_reset.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
18 zephyr,flash-controller = &fmc;
26 #address-cells = <1>;
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/Zephyr-latest/drivers/audio/
Dtlv320dac310x.c4 * SPDX-License-Identifier: Apache-2.0
25 #define CODEC_OUTPUT_VOLUME_MIN (-78 * 2)
66 const struct codec_driver_config *const dev_cfg = dev->config; in codec_initialize()
68 if (!device_is_ready(dev_cfg->bus.bus)) { in codec_initialize()
70 return -ENODEV; in codec_initialize()
73 if (!gpio_is_ready_dt(&dev_cfg->reset_gpio)) { in codec_initialize()
75 return -ENODEV; in codec_initialize()
84 const struct codec_driver_config *const dev_cfg = dev->config; in codec_configure()
87 if (cfg->dai_type != AUDIO_DAI_TYPE_I2S) { in codec_configure()
89 return -EINVAL; in codec_configure()
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