Searched full:pb09 (Results 1 – 25 of 101) sorted by relevance
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99 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */100 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */359 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */586 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */833 #define PIN_PB09E_TC0_WO1 _L_(41) /**< \brief TC0 signal: WO1 on PB09 mux E */910 #define PIN_PB09B_ADC0_AIN3 _L_(41) /**< \brief ADC0 signal: AIN3 on PB09 mux B */963 #define PIN_PB09B_ADC1_AIN5 _L_(41) /**< \brief ADC1 signal: AIN5 on PB09 mux B */988 #define PIN_PB09B_SDADC_INP1 _L_(41) /**< \brief SDADC signal: INP1 on PB09 mux B */1159 #define PIN_PB09I_CCL_OUT2 _L_(41) /**< \brief CCL signal: OUT2 on PB09 mux I */
103 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */104 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */397 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */648 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */935 #define PIN_PB09E_TC0_WO1 _L_(41) /**< \brief TC0 signal: WO1 on PB09 mux E */1032 #define PIN_PB09B_ADC0_AIN3 _L_(41) /**< \brief ADC0 signal: AIN3 on PB09 mux B */1093 #define PIN_PB09B_ADC1_AIN5 _L_(41) /**< \brief ADC1 signal: AIN5 on PB09 mux B */1118 #define PIN_PB09B_SDADC_INP1 _L_(41) /**< \brief SDADC signal: INP1 on PB09 mux B */1305 #define PIN_PB09I_CCL_OUT2 _L_(41) /**< \brief CCL signal: OUT2 on PB09 mux I */
104 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */105 #define GPIO_PB09 _UL_(1 << 9) /**< \brief GPIO Mask for PB09 */241 #define PIN_PB09D_TC0_A1 _L_(41) /**< \brief TC0 signal: A1 on PB09 mux D */449 #define PIN_PB09A_USART3_RXD _L_(41) /**< \brief USART3 signal: RXD on PB09 mux A */561 #define PIN_PB09C_GLOC_IN7 _L_(41) /**< \brief GLOC signal: IN7 on PB09 mux C */804 #define PIN_PB09G_CATB_SENSE29 _L_(41) /**< \brief CATB signal: SENSE29 on PB09 mux G */857 #define PIN_PB09F_LCDCA_SEG15 _L_(41) /**< \brief LCDCA signal: SEG15 on PB09 mux F */955 #define PIN_PB09B_PEVC_PAD_EVT2 _L_(41) /**< \brief PEVC signal: PAD_EVT2 on PB09 mux B */
97 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */98 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */325 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */565 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */745 #define PIN_PB09E_TC0_WO1 _L_(41) /**< \brief TC0 signal: WO1 on PB09 mux E */850 #define PIN_PB09B_ADC_AIN3 _L_(41) /**< \brief ADC signal: AIN3 on PB09 mux B */952 #define PIN_PB09B_OPAMP_OAPOS1 _L_(41) /**< \brief OPAMP signal: OAPOS1 on PB09 mux B */1057 #define PIN_PB09I_CCL_OUT2 _L_(41) /**< \brief CCL signal: OUT2 on PB09 mux I */
74 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */75 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */221 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */425 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */607 #define PIN_PB09E_TC4_WO1 _L_(41) /**< \brief TC4 signal: WO1 on PB09 mux E */651 #define PIN_PB09B_ADC_AIN3 _L_(41) /**< \brief ADC signal: AIN3 on PB09 mux B */
82 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */83 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */270 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */491 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */729 #define PIN_PB09E_TC4_WO1 _L_(41) /**< \brief TC4 signal: WO1 on PB09 mux E */781 #define PIN_PB09B_ADC_AIN3 _L_(41) /**< \brief ADC signal: AIN3 on PB09 mux B */
101 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */102 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */267 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */484 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */626 #define PIN_PB09F_TC4_WO1 _L_(41) /**< \brief TC4 signal: WO1 on PB09 mux F */652 #define PIN_PB09B_ADC_AIN3 _L_(41) /**< \brief ADC signal: AIN3 on PB09 mux B */
99 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */100 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */294 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */521 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */679 #define PIN_PB09F_TC4_WO1 _L_(41) /**< \brief TC4 signal: WO1 on PB09 mux F */713 #define PIN_PB09B_ADC_AIN3 _L_(41) /**< \brief ADC signal: AIN3 on PB09 mux B */
97 #define PIN_PB09 41 /**< \brief Pin Number for PB09 */98 #define PORT_PB09 (_UL_(1) << 9) /**< \brief PORT Mask for PB09 */295 #define PIN_PB09A_EIC_EXTINT9 _L_(41) /**< \brief EIC signal: EXTINT9 on PB09 mux A */935 #define PIN_PB09N_CCL_OUT2 _L_(41) /**< \brief CCL signal: OUT2 on PB09 mux N */952 #define PIN_PB09D_SERCOM4_PAD1 _L_(41) /**< \brief SERCOM4 signal: PAD1 on PB09 mux D */1026 #define PIN_PB09B_ADC0_AIN3 _L_(41) /**< \brief ADC0 signal: AIN3 on PB09 mux B */1078 #define PIN_PB09O_ADC0_DRV2 _L_(41) /**< \brief ADC0 signal: DRV2 on PB09 mux O */1166 #define PIN_PB09B_ADC0_PTCXY2 _L_(41) /**< \brief ADC0 signal: PTCXY2 on PB09 mux B */1251 #define PIN_PB09B_ADC1_AIN1 _L_(41) /**< \brief ADC1 signal: AIN1 on PB09 mux B */
