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/Zephyr-latest/samples/drivers/rtc/boards/
Dqemu_x86_64.overlay4 * SPDX-License-Identifier: Apache-2.0
8 * The RTC IRQ is not routed to the IOAPIC if the legacy
9 * IRQ bit is set. The IRQ is required for alarm
13 no-legacy-irq;
Dqemu_x86.overlay4 * SPDX-License-Identifier: Apache-2.0
8 * The RTC IRQ is not routed to the IOAPIC if the legacy
9 * IRQ bit is set. The IRQ is required for alarm
13 no-legacy-irq;
/Zephyr-latest/tests/drivers/rtc/rtc_api/boards/
Dqemu_x86.overlay4 * SPDX-License-Identifier: Apache-2.0
8 * The RTC IRQ is not routed to the IOAPIC if the legacy
9 * IRQ bit is set. The IRQ is required for alarm
13 no-legacy-irq;
Dqemu_x86_64.overlay4 * SPDX-License-Identifier: Apache-2.0
8 * The RTC IRQ is not routed to the IOAPIC if the legacy
9 * IRQ bit is set. The IRQ is required for alarm
13 no-legacy-irq;
/Zephyr-latest/dts/bindings/timer/
Dintel,hpet.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: HPET (High-Precision Event Timer)
17 no-legacy-irq:
19 description: Do not set legacy IRQ bit
/Zephyr-latest/lib/acpi/
Dacpi_shell.c4 * SPDX-License-Identifier: Apache-2.0
23 if (!res->Length) { in dump_dev_res()
28 switch (res->Type) { in dump_dev_res()
31 ACPI_RESOURCE_IRQ *irq_res = &res->Data.Irq; in dump_dev_res()
33 shell_print(sh, "\tDescriptorLength: %x", irq_res->DescriptorLength); in dump_dev_res()
34 shell_print(sh, "\tTriggering: %x", irq_res->Triggering); in dump_dev_res()
35 shell_print(sh, "\tPolarity: %x", irq_res->Polarity); in dump_dev_res()
36 shell_print(sh, "\tShareable: %x", irq_res->Shareable); in dump_dev_res()
37 shell_print(sh, "\tInterruptCount: %d", irq_res->InterruptCount); in dump_dev_res()
38 shell_print(sh, "\tInterrupts[0]: %x", irq_res->Interrupts[0]); in dump_dev_res()
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/Zephyr-latest/doc/kernel/services/smp/
Dsmp.rst8 "symmetric" in the sense that no specific CPU is treated specially by
12 No special application code needs to be written to take advantage of
26 non-Zephyr code).
54 on top of the pre-existing :c:struct:`atomic_` layer (itself usually
58 One important difference between IRQ locks and spinlocks is that the
65 re-acquire it or it will deadlock (it is perfectly legal to nest
71 recursive semantics above, spinlocks in single-CPU contexts produce
72 identical code to legacy IRQ locks. In fact the entirety of the
75 Legacy irq_lock() emulation
80 SMP systems with identical semantics to their legacy versions. They
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/Zephyr-latest/doc/releases/
Drelease-notes-1.7.rst9 interfaces. This is the last release that will support the deprecated legacy
10 nano- and micro-kernel APIs found in the 1.5.0 release and earlier.
12 This release introduces a new native IP stack, replacing the legacy uIP stack,
13 maintaining the legacy functionality, adding additional capabilities, and allowing
36 a legacy option to enable/disable legacy APIs. (using legacy.h)
52 * Added NXP FRDM-KW41Z board
53 * Added ST Nucleo-F334R8, Nucleo-L476G, STM3210C-EVAL, and STM32373C-EVAL boards
72 This version removes the legacy uIP stack and introduces a new native IP stack.
74 will support the same functionality as the legacy IP stack found in 1.6, and
80 enabled simultaneously. No routing functionality is provided by IP stack
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Drelease-notes-1.6.rst7 release introduces the unified Kernel replacing the separate nano- and
8 micro-kernels and simplifying the overall Zephyr architecture and programming
10 Support for the ARM Cortex-M0/M0+ family was added and board support for
11 Cortex-M was expanded.
18 * The legacy API is still supported but deprecated.
19 * Legacy tests and samples were moved to tests/legacy and samples/legacy.
20 * Unified kernel documentation was added and legacy nanokernel/microkernel
22 * Added support for several ARM Cortex-M boards
34 * Added DLIST to operate in all elements of a doubly-linked list.
52 * ARM: Added support for ARM Cortex-M0/M0+.
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Drelease-notes-1.11.rst12 * Thread-level memory protection on x86, ARC and Arm, userspace and memory
15 * Initial Armv8-M architecture support.
20 * Firmware over-the-air (FOTA) updates over BLE using MCUmgr.
32 * SMP-aware scheduler
47 * Armv8-M initial architecture support, including the following cores:
49 * Arm Cortex-M23
50 * Arm Cortex-M33
74 * Refactored dts.fixup so common SoC-related fixes are in arch/<*>/soc
75 and board dts.fixup is only used for board-specific items.
82 * Added I2C master, QSPI flash, and GPIO drivers for nios-II
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Dmigration-guide-3.6.rst35 instead use the new ``-DFILE_SUFFIX`` feature :ref:`application-file-suffixes`.
57 * NXP: Enabled :ref:`linkserver<linkserver-debug-host-tools>` to be the default runner on the
72 To enable them again use the ``west config manifest.project-filter -- +<module
73 name>`` command, or ``west config manifest.group-filter -- +optional`` to
81 command e.g. ``west flash --erase``. (:github:`64703`)
86 * If you have zcbor-generated code that relies on the zcbor libraries through Zephyr, you must
93 * All enum (choice) names have now gained a ``_c`` suffix, so the enum name no longer matches
107 :c:func:`zcbor_log`, and :c:func:`zcbor_trace` with no parameters is gone, and in its place are
123 macro avoids run-time string comparisons, and is also safer because it will
126 .. list-table::
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Drelease-notes-2.3.rst18 with future support for features like 64-bit and absolute timeouts in mind
21 * Zephyr now integrates with the TF-M (Trusted Firmware M) PSA-compliant
24 * The CMSIS-DSP library is now included and integrated
33 * CVE-2020-10022: UpdateHub Module Copies a Variable-Sized Hash String
34 into a fixed-size array.
35 * CVE-2020-10059: UpdateHub Module Explicitly Disables TLS
37 * CVE-2020-10061: Improper handling of the full-buffer case in the
39 * CVE-2020-10062: Packet length decoding error in MQTT
40 * CVE-2020-10063: Remote Denial of Service in CoAP Option Parsing Due
42 * CVE-2020-10068: In the Zephyr project Bluetooth subsystem, certain
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Drelease-notes-2.2.rst18 * Fix CVE-2020-10028
19 * Fix CVE-2020-10060
20 * Fix CVE-2020-10063
21 * Fix CVE-2020-10066
32 * :github:`23494` - Bluetooth: LL/PAC/SLA/BV-01-C fails if Slave-initiated Feature Exchange is disa…
33 * :github:`23485` - BT: host: Service Change indication sent regardless of whether it is needed or …
34 * :github:`23482` - 2M PHY + DLE and timing calculations on an encrypted link are wrong
35 * :github:`23070` - Bluetooth: controller: Fix ticker implementation to avoid catch up
36 * :github:`22967` - Bluetooth: controller: ASSERTION FAIL on invalid packet sequence
37 * :github:`24183` - [v2.2] Bluetooth: controller: split: Regression slave latency during connection…
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/Zephyr-latest/drivers/timer/
Dhpet.c2 * Copyright (c) 2018-2021 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/irq.h>
15 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
25 * specific. The timers are implemented as a single up-counter with
39 * COUNTER_CLK_PERIOD is not in femtoseconds (1e-15 sec).
44 #define GCONF_LR BIT(1) /* legacy interrupt routing, */
116 * 32-bit of the General Capabilities and ID Register. This can
209 /* COUNTER_CLK_PERIOD (CLK_PERIOD_REG) is in femtoseconds (1e-15 sec) */
216 * has no "sense" cell.
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Dmchp_mec5_ktimer.c3 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/irq.h>
39 * system timer. It supports both legacy ("tickful") mode as well as
58 /* Mask off bits[31:28] of 32-bit count */
103 * was on. We detect the timer is in the load state by checking the read-only
126 * the tick announced as soon as possible, ideally no more than one tick
130 * RTMR counter register is read-only and is loaded from the preload
131 * register by a 0->1 transition of the control register start bit.
147 * global objects safe from pre-emption? in sys_clock_set_timeout()
157 full_ticks = MAX_TICKS - 1; in sys_clock_set_timeout()
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/Zephyr-latest/subsys/bluetooth/controller/
DKconfig.ll_sw_split3 # Copyright (c) 2016-2017 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
120 # Hidden, Controller's Co-Operative high priority Rx thread stack size.
125 # Hidden, Controller's Co-Operative Rx thread stack size.
152 https://www.bluetooth.com/specifications/assigned-numbers/company-identifiers
162 bool "Legacy AD Data backup"
166 Backup Legacy Advertising Data when switching to Legacy Directed or
168 Legacy Non-Directed Advertising mode.
170 Advertising or switch between Legacy and Extended Advertising.
180 zero-based numbering. When using with Zephyr host this option can be
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/Zephyr-latest/include/zephyr/drivers/interrupt_controller/
Dloapic.h1 /* loapic.h - public LOAPIC APIs */
6 * SPDX-License-Identifier: Apache-2.0
27 #define LOAPIC_ISR 0x100 /* In-service Reg */
65 void z_loapic_int_vec_set(unsigned int irq, unsigned int vector);
66 void z_loapic_irq_enable(unsigned int irq);
67 void z_loapic_irq_disable(unsigned int irq);
70 * @brief Read 64-bit value from the local APIC in x2APIC mode.
81 * @brief Read 32-bit value from the local APIC in xAPIC (MMIO) mode.
95 * Returns a 32-bit value read from the local APIC, using the access
97 * that 64-bit reads are only allowed in x2APIC mode and can only be
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/Zephyr-latest/drivers/espi/
Dhost_subs_npcx.c4 * SPDX-License-Identifier: Apache-2.0
13 * This file contains the drivers of NPCX Host Sub-Modules that serve as an
16 * +------------+
17 * | Serial |---> TXD
18 * +<--->| Port |<--- RXD
19 * | | |<--> ...
20 * | +------------+
21 * | +------------+ |
22 * +------------+ |<--->| KBC & PM |<--->|
23 * eSPI_CLK --->| eSPI Bus | | | Channels | |
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/Zephyr-latest/arch/x86/
DKconfig3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
4 # SPDX-License-Identifier: Apache-2.0
13 # CPU Families - the SoC configuration should select the right one.
61 # Configuration common to both IA32 and Intel64 sub-architectures.
65 bool "Run in 64-bit mode"
163 bool "Compiler-generated SSEx instructions for floating point math"
191 This value normally need to be page-aligned.
197 int "Number of IRQ lines"
201 This option specifies the number of IRQ lines in the system. It
203 is used to track the association between vectors and IRQ numbers.
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/Zephyr-latest/drivers/gpio/
Dgpio_intel.c2 * Copyright (c) 2018-2019 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
17 * Due to GPIO callback only allowing 32 pins (as a 32-bit mask) at once,
18 * each set is further sub-divided into multiple devices, so
29 #include <zephyr/irq.h>
30 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
92 ((const struct gpio_intel_config *)(_dev)->config)
93 #define DEV_DATA(_dev) ((struct gpio_intel_data *)(_dev)->data)
130 #define REG_GPI_INT_STS_BASE_GET(data) (data)->intr_stat_reg
132 #define REG_GPI_INT_EN_BASE_GET(data) (data)->intr_stat_reg + 0x20
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/Zephyr-latest/include/zephyr/drivers/
Duart.h2 * Copyright (c) 2018-2019 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
69 * RS-485 half-duplex. This error is only valid on UARTs that
79 UART_CFG_PARITY_NONE, /**< No parity */
111 UART_CFG_FLOW_CTRL_NONE, /**< No flow control */
129 * @defgroup uart_interrupt Interrupt-driven UART API
161 * - Provide second buffer using uart_rx_buf_rsp, when first buffer is
163 * - Ignore the event, this way when current buffer is filled
168 * is counted from last byte received i.e. if no data was received, there
171 * no longer used by the driver. It will immediately follow #UART_RX_RDY event.
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/Zephyr-latest/doc/connectivity/bluetooth/
Dbluetooth-ctlr-arch.rst1 .. _bluetooth-ctlr-arch:
27 * Software-based Link Layer implementation
107 Pre-emption of Active Event
133 - Event handle (0, 1) < Event preparation (2, 3) < Event/Rx done (4) < Tx
136 - LLL is vendor ISR, ULL is Mayfly ISR concept, Host is kernel thread.
147 - HCI/LLCP API
152 - lll_prepare context to drive ull_cp_run()
156 - rx_demux context to drive ull_cp_tx_ack() and ull_cp_rx()
164 - struct llcp_struct
168 * Basic conn-level abstraction
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/Zephyr-latest/drivers/i3c/
Di3c_stm32.c4 * SPDX-License-Identifier: Apache-2.0
60 STM32_I2C_SF, /* I2C legacy msg state */
99 struct i2c_msg *i2c_msg_ptr; /* Pointer to the current legacy message to send on the bus */
116 irq_config_func_t irq_config_func; /* IRQ config function */
133 size_t ccc_target_idx; /* Current target index, used for filling C-FIFO */
176 for (int i = 0; i < dev_list->num_i2c; i++) { in i3c_bus_mode()
177 switch (I3C_LVR_I2C_DEV_IDX(dev_list->i2c[i].lvr)) { in i3c_bus_mode()
203 for (int i = 0; i < dev_list->num_i2c; i++) { in get_i3c_lvr_ic_mode()
204 if (I3C_LVR_I2C_DEV_IDX(dev_list->i2c[i].lvr) == I3C_LVR_I2C_DEV_IDX_0) { in get_i3c_lvr_ic_mode()
205 if (I3C_LVR_I2C_MODE(dev_list->i2c[i].lvr) == I3C_LVR_I2C_FM_MODE) { in get_i3c_lvr_ic_mode()
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/Zephyr-latest/soc/mediatek/mt8xxx/
Dsoc.c2 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/sys/libc-hooks.h>
50 * 0-5 0-5 1 (L1 is shared w/exceptions, poor choice)
51 * 6-7 7-8 1
52 * 8-10 9-11 2
53 * 11-13 16-18 3
105 volatile uint32_t *p = bit < 32 ? &g->lo : &g->hi; in set_group_bit()
111 static void mt8196_intc_set_irq_group(uint32_t irq, uint32_t group) in mt8196_intc_set_irq_group() argument
114 set_group_bit(&INTC.groups[i], irq, i == group); in mt8196_intc_set_irq_group()
132 * legacy settings in mt8196_intc_init()
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/Zephyr-latest/include/zephyr/arch/arc/
Darch.h4 * SPDX-License-Identifier: Apache-2.0
12 * included by the kernel interface architecture-abstraction header
24 #include "sys-io-common.h"
27 #include <zephyr/arch/arc/v2/irq.h>
65 * - otherwise all interrupts will use same register bank. Such configuration isn't supported in
86 #error "Non-multithreading mode isn't supported on SMP targets"
110 * For regions that are NOT the minimum size, this define has no semantics
132 /* Kernel-only stacks have the following layout if a stack guard is enabled:
134 * +------------+ <- thread.stack_obj
136 * +------------+ <- thread.stack_info.start
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