Lines Matching +full:no +full:- +full:legacy +full:- +full:irq

3  * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/irq.h>
39  * system timer. It supports both legacy ("tickful") mode as well as
58 /* Mask off bits[31:28] of 32-bit count */
103  * was on. We detect the timer is in the load state by checking the read-only
126  * the tick announced as soon as possible, ideally no more than one tick
130  * RTMR counter register is read-only and is loaded from the preload
131  * register by a 0->1 transition of the control register start bit.
147 		 * global objects safe from pre-emption?  in sys_clock_set_timeout()
157 		full_ticks = MAX_TICKS - 1;  in sys_clock_set_timeout()
159 		full_ticks = n - 1;  in sys_clock_set_timeout()
174 	temp += (cached_icr - ccr);  in sys_clock_set_timeout()
178 	partial_cycles = CYCLES_PER_TICK - (total_cycles % CYCLES_PER_TICK);  in sys_clock_set_timeout()
183 		temp -= RTIMER_ADJUST_CYCLES;  in sys_clock_set_timeout()
207 	elapsed = (int32_t)total_cycles - (int32_t)last_announcement;  in sys_clock_elapsed()
209 		elapsed = -1 * elapsed;  in sys_clock_elapsed()
212 	ticks += cached_icr - ccr;  in sys_clock_elapsed()
241 	/* handle wrap by using (power of 2) - 1 mask */  in mec5_ktimer_isr()
242 	ticks = total_cycles - last_announcement;  in mec5_ktimer_isr()
253 /* Non-tickless kernel build. */
282  * 1. Kernel call to k_cycle_get_32() -> arch_k_cycle_get_32() -> here.
297 	ret = (total_cycles + (cached_icr - ccr)) & RTIMER_COUNT_MASK;  in sys_clock_cycle_get_32()
319  * 32-bit basic timer divided down to 1 MHz. Basic timer configured
320  * for count up, auto-reload, and no interrupt mode.
333 		if ((curr - start) >= usec_to_wait) {  in arch_busy_wait()