Lines Matching +full:no +full:- +full:legacy +full:- +full:irq

2  * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/sys/libc-hooks.h>
50  *     0-5        0-5       1  (L1 is shared w/exceptions, poor choice)
51  *     6-7        7-8       1
52  *    8-10       9-11       2
53  *   11-13      16-18       3
105 	volatile uint32_t *p  = bit < 32 ? &g->lo : &g->hi;  in set_group_bit()
111 static void mt8196_intc_set_irq_group(uint32_t irq, uint32_t group)  in mt8196_intc_set_irq_group()  argument
114 		set_group_bit(&INTC.groups[i], irq, i == group);  in mt8196_intc_set_irq_group()
132 	 * legacy settings  in mt8196_intc_init()
184 	/* Note: we set the linked/in-use-by-zephyr regions of both  in enable_mpu()
203 	 * non-monotonic segment at the current instruction fetch.  The  in enable_mpu()
209 	for (int32_t i = 31; i >= 32 - nseg; i--) {  in enable_mpu()
210 		int32_t mpuidx = i - (32 - nseg);  in enable_mpu()
216 		 * the same cache line.  Jumping to an aligned-by-8  in enable_mpu()
217 		 * address ensures that the following two (3-byte)  in enable_mpu()
218 		 * instructions are in the same 8 byte-aligned region.  in enable_mpu()
230  * backend.  This simply appends a null-terminated string to an
236  * output, there's no way to detect a reset of the stream, and in fact
239  * even if this device has a ton of usably-mapped DRAM
250 	const size_t max = LOG_LEN - 4;  in arch_printk_char_out()
262 	extern char _bss_start, _bss_end, z_xtensa_vecbase; /* Linker-emitted */  in c_boot()
297 	 * This region is uncached, no need to flush.  in c_boot()
299 	memset(_mtk_adsp_sram_end, 0, SRAM_END - (uint32_t)&_mtk_adsp_sram_end);  in c_boot()
300 	memset(_mtk_adsp_dram_end, 0, DRAM_END - (uint32_t)&_mtk_adsp_dram_end);  in c_boot()