Searched full:main (Results 1 – 25 of 126) sorted by relevance
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50 __IO uint32_t CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */51 __IO uint32_t CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */168 /* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */169 #define CKGR_MOR_MOSCXTEN (0x1u << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */170 #define CKGR_MOR_MOSCXTBY (0x1u << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */172 #define CKGR_MOR_MOSCRCEN (0x1u << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */174 #define CKGR_MOR_MOSCRCF_Msk (0x7u << CKGR_MOR_MOSCRCF_Pos) /**< \brief (CKGR_MOR) Main On-Chip RC …180 #define CKGR_MOR_MOSCXTST_Msk (0xffu << CKGR_MOR_MOSCXTST_Pos) /**< \brief (CKGR_MOR) Main Crystal …186 #define CKGR_MOR_MOSCSEL (0x1u << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */188 /* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */[all …]
50 __IO uint32_t CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */51 __I uint32_t CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */172 /* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */173 #define CKGR_MOR_MOSCXTEN (0x1u << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */174 #define CKGR_MOR_MOSCXTBY (0x1u << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */175 #define CKGR_MOR_MOSCRCEN (0x1u << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */177 #define CKGR_MOR_MOSCRCF_Msk (0x7u << CKGR_MOR_MOSCRCF_Pos) /**< \brief (CKGR_MOR) Main On-Chip RC …182 #define CKGR_MOR_MOSCXTST_Msk (0xffu << CKGR_MOR_MOSCXTST_Pos) /**< \brief (CKGR_MOR) Main Crystal …187 #define CKGR_MOR_MOSCSEL (0x1u << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */189 /* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */[all …]
91 #define SMC_CFG_PAGESIZE_PS512 (0x0u << 0) /**< \brief (SMC_CFG) Main area 512 Bytes */92 #define SMC_CFG_PAGESIZE_PS1024 (0x1u << 0) /**< \brief (SMC_CFG) Main area 1024 Bytes */93 #define SMC_CFG_PAGESIZE_PS2048 (0x2u << 0) /**< \brief (SMC_CFG) Main area 2048 Bytes */94 #define SMC_CFG_PAGESIZE_PS4096 (0x3u << 0) /**< \brief (SMC_CFG) Main area 4096 Bytes */174 #define SMC_ECC_MD_ECC_PAGESIZE_PS512 (0x0u << 0) /**< \brief (SMC_ECC_MD) Main area 512 Words */175 #define SMC_ECC_MD_ECC_PAGESIZE_PS1024 (0x1u << 0) /**< \brief (SMC_ECC_MD) Main area 1024 Words …176 #define SMC_ECC_MD_ECC_PAGESIZE_PS2048 (0x2u << 0) /**< \brief (SMC_ECC_MD) Main area 2048 Words …177 #define SMC_ECC_MD_ECC_PAGESIZE_PS4096 (0x3u << 0) /**< \brief (SMC_ECC_MD) Main area 4096 Words …
50 RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */51 RwReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */171 /* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */172 #define CKGR_MOR_MOSCXTEN (0x1u << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */173 #define CKGR_MOR_MOSCXTBY (0x1u << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */175 #define CKGR_MOR_MOSCRCEN (0x1u << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */177 #define CKGR_MOR_MOSCRCF_Msk (0x7u << CKGR_MOR_MOSCRCF_Pos) /**< \brief (CKGR_MOR) Main On-Chip RC …183 #define CKGR_MOR_MOSCXTST_Msk (0xffu << CKGR_MOR_MOSCXTST_Pos) /**< \brief (CKGR_MOR) Main Crystal …189 #define CKGR_MOR_MOSCSEL (0x1u << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */191 /* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */[all …]
647 /* -------- CKGR_MOR : (PMC Offset: 0x20) (R/W 32) Main Oscillator Register -------- */652 … uint32_t MOSCXTEN:1; /**< bit: 0 Main Crystal Oscillator Enable */653 … uint32_t MOSCXTBY:1; /**< bit: 1 Main Crystal Oscillator Bypass */655 … uint32_t MOSCRCEN:1; /**< bit: 3 Main RC Oscillator Enable */656 … uint32_t MOSCRCF:3; /**< bit: 4..6 Main RC Oscillator Frequency Selection */658 … uint32_t MOSCXTST:8; /**< bit: 8..15 Main Crystal Oscillator Startup Time */660 … uint32_t MOSCSEL:1; /**< bit: 24 Main Clock Oscillator Selection */670 … (0x20) /**< (CKGR_MOR) Main Oscillator Register…672 … 0 /**< (CKGR_MOR) Main Crystal Oscillator …673 … (_U_(0x1) << CKGR_MOR_MOSCXTEN_Pos) /**< (CKGR_MOR) Main Crystal Oscillator …[all …]
635 /* -------- CKGR_MOR : (PMC Offset: 0x20) (R/W 32) Main Oscillator Register -------- */640 … uint32_t MOSCXTEN:1; /**< bit: 0 Main Crystal Oscillator Enable */641 … uint32_t MOSCXTBY:1; /**< bit: 1 Main Crystal Oscillator Bypass */643 … uint32_t MOSCRCEN:1; /**< bit: 3 Main RC Oscillator Enable */644 … uint32_t MOSCRCF:3; /**< bit: 4..6 Main RC Oscillator Frequency Selection */646 … uint32_t MOSCXTST:8; /**< bit: 8..15 Main Crystal Oscillator Startup Time */648 … uint32_t MOSCSEL:1; /**< bit: 24 Main Clock Oscillator Selection */658 … (0x20) /**< (CKGR_MOR) Main Oscillator Register…660 … 0 /**< (CKGR_MOR) Main Crystal Oscillator …661 … (_U_(0x1) << CKGR_MOR_MOSCXTEN_Pos) /**< (CKGR_MOR) Main Crystal Oscillator …[all …]
360 …Wi-Fi's main callback function handler, for handling the M2M_WIFI events received on the Wi-Fi int…626 Any application using the WINC driver must call this function at the start of its main function.701 …dantly of any other condition. It's ideal to include this function in the main and the most freque…1005 int main()1128 int main()1246 int main()1357 int main()1432 …e AP mode is enabled after the driver is initialized in the application's main function and the ha…1455 int main()1689 …rates an example of how the scan request is called from the application's main function and the ha…[all …]
41 #define REG_CKGR_MOR (0x400E0420U) /**< \brief (PMC) Main Oscillator Register */42 #define REG_CKGR_MCFR (0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */67 #define REG_CKGR_MOR (*(RwReg*)0x400E0420U) /**< \brief (PMC) Main Oscillator Register */68 #define REG_CKGR_MCFR (*(RwReg*)0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */
41 …#define REG_CKGR_MOR (0x400E0420U) /**< \brief (PMC) Main Oscillator Register */42 …#define REG_CKGR_MCFR (0x400E0424U) /**< \brief (PMC) Main Clock Frequency Regis…68 …#define REG_CKGR_MOR (*(__IO uint32_t*)0x400E0420U) /**< \brief (PMC) Main Oscillator Register */69 …#define REG_CKGR_MCFR (*(__IO uint32_t*)0x400E0424U) /**< \brief (PMC) Main Clock Frequency Regis…
42 …#define REG_CKGR_MOR (0x400E0620U) /**< \brief (PMC) Main Oscillator Register */43 …#define REG_CKGR_MCFR (0x400E0624U) /**< \brief (PMC) Main Clock Frequency Regis…69 …#define REG_CKGR_MOR (*(__IO uint32_t*)0x400E0620U) /**< \brief (PMC) Main Oscillator Register */70 …#define REG_CKGR_MCFR (*(__I uint32_t*)0x400E0624U) /**< \brief (PMC) Main Clock Frequency Regis…
44 #define REG_CKGR_MOR (0x400E0620) /**< (PMC) Main Oscillator Register */45 #define REG_CKGR_MCFR (0x400E0624) /**< (PMC) Main Clock Frequency Register */92 #define REG_CKGR_MOR (*(__IO uint32_t*)0x400E0620U) /**< (PMC) Main Oscillator Register …93 #define REG_CKGR_MCFR (*(__IO uint32_t*)0x400E0624U) /**< (PMC) Main Clock Frequency Regi…
44 #define REG_CKGR_MOR (0x400E0620) /**< (PMC) Main Oscillator Register */45 #define REG_CKGR_MCFR (0x400E0624) /**< (PMC) Main Clock Frequency Register */95 #define REG_CKGR_MOR (*(__IO uint32_t*)0x400E0620U) /**< (PMC) Main Oscillator Register …96 #define REG_CKGR_MCFR (*(__IO uint32_t*)0x400E0624U) /**< (PMC) Main Clock Frequency Regi…
5 from sampinctrl import main11 main(data, tmp_path)
55 uint32_t VREGOK:1; /*!< bit: 10 Main VREG OK */88 #define BSCIF_IER_VREGOK_Pos 10 /**< \brief (BSCIF_IER) Main VREG OK */165 uint32_t VREGOK:1; /*!< bit: 10 Main VREG OK */198 #define BSCIF_IMR_VREGOK_Pos 10 /**< \brief (BSCIF_IMR) Main VREG OK */220 uint32_t VREGOK:1; /*!< bit: 10 Main VREG OK */253 #define BSCIF_ISR_VREGOK_Pos 10 /**< \brief (BSCIF_ISR) Main VREG OK */275 uint32_t VREGOK:1; /*!< bit: 10 Main VREG OK */308 #define BSCIF_ICR_VREGOK_Pos 10 /**< \brief (BSCIF_ICR) Main VREG OK */330 uint32_t VREGOK:1; /*!< bit: 10 Main VREG OK */362 #define BSCIF_PCLKSR_VREGOK_Pos 10 /**< \brief (BSCIF_PCLKSR) Main VREG OK */
41 /* -------- PM_MCCTRL : (PM Offset: 0x000) (R/W 32) Main Clock Control -------- */45 uint32_t MCSEL:3; /*!< bit: 0.. 2 Main Clock Select */52 #define PM_MCCTRL_OFFSET 0x000 /**< \brief (PM_MCCTRL offset) Main Clock Control …53 #define PM_MCCTRL_RESETVALUE _U_(0x00000000); /**< \brief (PM_MCCTRL reset_value) Main Clock…55 #define PM_MCCTRL_MCSEL_Pos 0 /**< \brief (PM_MCCTRL) Main Clock Select */934 __IO uint32_t MCCTRL; /**< \brief Offset: 0x000 (R/W 32) Main Clock Control */
105 * | 40 K | 236 K | Main Firmware/program | Main Firmware to run WiFi Chip |
34 #define REG_PM_MCCTRL (0x400E0000) /**< \brief (PM) Main Clock Control */64 #define REG_PM_MCCTRL (*(RwReg *)0x400E0000UL) /**< \brief (PM) Main Clock Control */
227 def main(indir, outdir) -> None: function284 main(args.indir, args.outdir)
2 main: bsd-x11
819 …The main socket application callback function. Applications register their main socket application…1030 printf("main: m2m_wifi_init call error!(%d)\r\n", ret);1409 …ing how the asynchronous call to the connect function is made through the main function and how th…1411 \subsection sub1 Main Function
73 … 512 // Size Of Page (Bytes, Smallest Granularity for Write Operation In Main Array)
