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/Zephyr-latest/dts/riscv/
Driscv32-litex-vexriscv.dtsi12 compatible = "litex,vexriscv", "litex-dev";
13 model = "litex,vexriscv";
25 compatible = "litex,vexriscv-standard", "riscv";
35 compatible = "litex,vexriscv";
38 compatible = "litex,soc-controller";
47 compatible = "litex,vexriscv-intc0";
56 compatible = "litex,uart";
79 compatible = "litex,spi";
97 compatible = "litex,spi-litespi";
121 compatible = "litex,timer0";
[all …]
/Zephyr-latest/dts/bindings/clock/
Dlitex,clk.yaml7 LiteX Mixed Mode Clock Manager
12 compatible: "litex,clk"
33 litex,lock-timeout:
38 litex,drdy-timeout:
43 litex,divclk-divide-min:
48 litex,divclk-divide-max:
53 litex,clkfbout-mult-min:
58 litex,clkfbout-mult-max:
63 litex,vco-freq-min:
68 litex,vco-freq-max:
[all …]
Dlitex,clkout.yaml7 LiteX Mixed Mode Clock Manager clock output binding
9 compatible: "litex,clkout"
28 litex,clock-frequency:
34 litex,clock-phase:
40 litex,clock-duty-num:
46 litex,clock-duty-den:
52 litex,clock-margin:
58 litex,clock-margin-exp:
/Zephyr-latest/boards/enjoydigital/litex_vexriscv/doc/
Dindex.rst3 LiteX VexRiscv
6 LiteX VexRiscv is an example of a system on a chip (SoC) that consists of
9 `Zephyr on LiteX VexRiscv (reference platform)
10 <https://github.com/litex-hub/zephyr-on-litex-vexriscv>`_
11 or `LiteX SoC Builder <https://github.com/enjoy-digital/litex>`_
18 LiteX VexRiscv SoC implementation generated for the
25 :alt: LiteX VexRiscv on Digilent Arty 35T Board
27 LiteX is based on
33 More information about the LiteX project can be found on
34 `LiteX's website <https://github.com/enjoy-digital/litex>`_.
[all …]
/Zephyr-latest/drivers/spi/
DKconfig.litex1 # LiteX SPI (LiteSPI) configuration option
7 bool "LiteX SPI controller driver"
11 Enable the SPI peripherals on LiteX
14 bool "LiteX SPI LiteSPI controller driver"
18 Enable the SPI peripherals on LiteX
/Zephyr-latest/samples/drivers/clock_control_litex/
DREADME.rst1 .. zephyr:code-sample:: clock-control-litex
2 :name: LiteX clock control driver
5 Use LiteX clock control driver to generate multiple clock signals.
10 This sample is providing an overview of LiteX clock control driver capabilities.
15 * LiteX-capable FPGA platform with MMCM modules (for example Digilent Arty A7 development board)
16 * SoC configuration with VexRiscv soft CPU and Xilinx 7-series MMCM interface in LiteX (S7MMCM modu…
23 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
29 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
35 .. literalinclude:: ../../../dts/riscv/riscv32-litex-vexriscv.dtsi
41 …values for FPGA-specific configuration (parameters from ``litex,divclk-divide-min`` to ``litex,vco…
[all …]
/Zephyr-latest/drivers/gpio/
DKconfig.litex1 # Litex VexRiscV GPIO configuration options
7 bool "Litex GPIO driver"
11 Enable Litex GPIO driver.
/Zephyr-latest/drivers/watchdog/
DKconfig.litex1 # LiteX WDT configuration
7 bool "LiteX Watchdog (WDT) Driver"
12 Enable WDT driver for LiteX.
/Zephyr-latest/drivers/serial/
DKconfig.litex1 # LiteX UART configuration option
7 bool "LiteX serial driver"
13 This option enables LiteX UART serial driver.
/Zephyr-latest/drivers/clock_control/
DKconfig.litex1 # LiteX SoC Builder clock control driver
7 bool "LiteX MMCM clock control"
11 This option enables LiteX clock control driver.
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_control_litex.h9 * @brief LiteX Clock Control driver interface
16 * @brief LiteX Clock Control driver interface
17 * @defgroup clock_control_litex_interface LiteX Clock Control driver interface
18 * @brief LiteX Clock Control driver interface
/Zephyr-latest/boards/enjoydigital/litex_vexriscv/
Dboard.yml3 full_name: LiteX VexRiscv
4 vendor: litex
/Zephyr-latest/dts/bindings/spi/
Dlitex,spi-litespi.yaml1 description: LiteX SPI LiteSPI Controller
3 compatible: "litex,spi-litespi"
/Zephyr-latest/drivers/mdio/
DKconfig.litex5 bool "Litex LiteEth MDIO controller driver"
9 Enable MDIO support from Litex LiteEth controller.
/Zephyr-latest/dts/bindings/mdio/
Dlitex,liteeth-mdio.yaml4 description: LiteX LiteEth MDIO bitbang driver
6 compatible: "litex,liteeth-mdio"
/Zephyr-latest/dts/bindings/riscv/
Dlitex,soc-controller.yaml4 description: LiteX SoC Controller driver
6 compatible: "litex,soc-controller"
/Zephyr-latest/drivers/i2c/
DKconfig.litex5 bool "LiteX I2C driver"
10 Enable support for Litex I2C driver
/Zephyr-latest/dts/bindings/rng/
Dlitex,prbs.yaml4 description: LiteX PRBS
6 compatible: "litex,prbs"
/Zephyr-latest/dts/bindings/watchdog/
Dlitex,watchdog.yaml4 description: LiteX watchdog.
6 compatible: "litex,watchdog"
/Zephyr-latest/dts/bindings/hwinfo/
Dlitex,dna0.yaml4 description: LiteX DNA ID reader
6 compatible: "litex,dna0"
/Zephyr-latest/dts/bindings/cpu/
Dlitex,vexriscv-standard.yaml5 description: VexRiscv core with the standard configuration as used by LiteX
7 compatible: "litex,vexriscv-standard"
/Zephyr-latest/dts/bindings/timer/
Dlitex,timer0.yaml4 description: LiteX timer
6 compatible: "litex,timer0"
/Zephyr-latest/dts/bindings/ethernet/
Dlitex,liteeth.yaml4 description: LiteX Ethernet
6 compatible: "litex,liteeth"
/Zephyr-latest/dts/bindings/serial/
Dlitex,uart.yaml4 description: LiteX UART
6 compatible: "litex,uart"
/Zephyr-latest/dts/bindings/i2c/
Dlitex,i2c.yaml7 description: LiteX I2C controller
9 compatible: "litex,i2c"

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