Home
last modified time | relevance | path

Searched +full:left +full:- +full:shifted (Results 1 – 18 of 18) sorted by relevance

/Zephyr-latest/dts/bindings/i3c/
Di3c-device.yaml2 # SPDX-License-Identifier: Apache-2.0
8 on-bus: i3c
23 ID left-shifted by 1, where the manufacturer ID is
24 the bits 33-47 (zero-based) of the 48-bit Provisioned ID.
26 the part ID (bits 16-31 of the Provisioned ID) left-shifted
27 by 16, and the instance ID (bits 12-15 of the Provisioned ID)
28 left-shifted by 12. Basically, this is the lower 32 bits
33 where the PID part is expanded to be a 64-bit integer.
37 1. 7-bit address of the I2C device. (Note that 10-bit
58 are both expanded to 32-bit integers.
[all …]
/Zephyr-latest/samples/drivers/i2s/output/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
20 -3212, -6393, -9512, -12540, -15447, -18205, -20788, -23170,
21 -25330, -27245, -28898, -30273, -31357, -32138, -32610, -32767,
22 -32610, -32138, -31357, -30273, -28898, -27245, -25330, -23170,
23 -20788, -18205, -15447, -12540, -9512, -6393, -3212, -1,
26 /* Fill buffer with sine wave on left channel, and sine wave shifted by
35 /* Left channel is sine wave */ in fill_buf()
37 /* Right channel is same sine wave, shifted by 90 degrees */ in fill_buf()
69 return -ENODEV; in main()
/Zephyr-latest/doc/build/version/
Dindex.rst1 .. _app-version-details:
8 version file and have application (or module) code include the auto-generated file and be able to
18 images to be signed with correct version of the application automatically - no manual signing
24 Application version information is set on a per-application basis in a file named :file:`VERSION`,
29 .. code-block:: cfg
42 +---------------+----------------------------------------+
44 +---------------+----------------------------------------+
45 | VERSION_MAJOR | Numerical (0-255) |
46 +---------------+----------------------------------------+
47 | VERSION_MINOR | Numerical (0-255) |
[all …]
/Zephyr-latest/include/zephyr/audio/
Ddmic.h7 * SPDX-License-Identifier: Apache-2.0
68 * PDM Channels LEFT / RIGHT
71 PDM_CHAN_LEFT, /**< Left channel */
137 * Each channel is described as a 4-bit number, the least significant
138 * bit indicates LEFT/RIGHT selection of the PDM controller.
141 * - bits 0-3 are for channel 0, bit 0 indicates LEFT or RIGHT
142 * - bits 4-7 are for channel 1, bit 4 indicates LEFT or RIGHT
145 * CONSTRAINT: The LEFT and RIGHT channels of EACH PDM controller needs
201 * Returns the map of PDM controller and LEFT/RIGHT channel shifted to
206 * @param lr LEFT/RIGHT channel within the chosen PDM hardware controller
[all …]
/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst3 Improved Inter-Integrated Circuit (I3C) Bus
6 I3C (Improved Inter-Integrated Circuit) is a two-signal shared
18 .. _i3c-controller-api:
36 .. code-block:: c
82 for example, at power-on. So it is a good idea to reset and
133 #. Do ``ENEC`` to re-enable events from devices.
135 * The helper function, :c:func:`i3c_bus_init`, only re-enables
136 hot-join events. IBI event should only be enabled when
139 In-Band Interrupt (IBI)
142 If a target device can generate In-Band Interrupt (IBI),
[all …]
/Zephyr-latest/samples/subsys/usb/uac2_explicit_feedback/src/
Dfeedback_nrf53.c4 * SPDX-License-Identifier: Apache-2.0
41 * this sample uses target-specific code to perform the measurements. Note that
42 * the use of dedicated target-specific peripheral essentially eliminates
46 * Full-Speed isochronous feedback is Q10.10 unsigned integer left-justified in
47 * the 24-bits so it has Q10.14 format. This sample application puts zeroes to
109 LOG_ERR("nrfx timer init error (sample clk feedback) - Return value: %d", err); in feedback_edge_counter_setup()
142 LOG_ERR("nrfx timer init error (relative timer) - Return value: %d", err); in feedback_relative_timer_setup()
212 * USB host SOF clock) to fake sample clock shifted by P values. in update_sof_offset()
228 sof_offset = framestart_cc - (SAMPLES_PER_SOF << FEEDBACK_P); in update_sof_offset()
237 if ((ctx->rel_sof_offset >= 0) != (sof_offset >= 0)) { in update_sof_offset()
[all …]
/Zephyr-latest/include/zephyr/dsp/
Dbasicmath.h1 /* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
2 * SPDX-License-Identifier: Apache-2.0
29 * Element-by-element multiplication of two vectors.
33 * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
83 * @brief Floating-point vector multiplication.
100 * Element-by-element addition of two vectors.
104 * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
109 * @brief Floating-point vector addition.
171 * Element-by-element subtraction of two vectors.
173 * dst[n] = src_a[n] - src_b[n], 0 <= n < block_size.
[all …]
/Zephyr-latest/subsys/mgmt/mcumgr/grp/img_mgmt/
DKconfig2 # Copyright Nordic Semiconductor ASA 2020-2022. All rights reserved.
3 # SPDX-License-Identifier: Apache-2.0
10 # MCUMGR_GRP_IMG_ -- general group options;
63 non-0 "rc" codes.
66 bool "Allow to confirm secondary slot of non-active image"
69 Allows to confirm secondary (non-active) slot of non-active image.
70 Normally it should not be allowed to confirm any slots of non-active
76 bool "Allow to confirm slots of non-active image"
79 Allows to confirm any slot of non-active image.
80 Normally it should not be allowed to confirm any slots of non-active
[all …]
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dmultiprocessing.c2 * SPDX-License-Identifier: Apache-2.0
5 #include <cavs-idc.h>
22 #define IDC_CORE_MASK(num_cpus) (BIT(num_cpus) - 1)
51 * below, it will be ignored. But it's left in place for in soc_start_core()
58 * can only be backwards-referenced. So we hand-assemble a in soc_start_core()
62 * Long term we want to have this in linkable LP-SRAM memory in soc_start_core()
85 if (pm_state_next_get(cpu_num)->state == PM_STATE_ACTIVE) { in soc_start_core()
115 /* Send power-up message to the other core. Start address in soc_start_core()
117 * available, so it's sent shifted). The write to ITC in soc_start_core()
159 * level-sensitive interrupt triggered by a logical OR of each in idc_isr()
[all …]
/Zephyr-latest/drivers/display/
Ddisplay_renesas_lcdc.c4 * SPDX-License-Identifier: Apache-2.0
104 if (atomic_test_and_set_bit(data->pm_policy_state_flag, 0) == 0) { in lcdc_smartbond_pm_policy_state_lock_get()
117 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, 0) == 1) { in lcdc_smartbond_pm_policy_state_lock_put()
143 const struct display_smartbond_config *config = dev->config; in display_smartbond_configure()
144 struct display_smartbond_data *data = dev->data; in display_smartbond_configure()
154 return -EINVAL; in display_smartbond_configure()
157 da1469x_lcdc_parallel_interface_configure((lcdc_smartbond_mode_cfg *)&config->mode); in display_smartbond_configure()
158 da1469x_lcdc_bgcolor_configure((lcdc_smartbond_bgcolor_cfg *)&config->bgcolor_cfg); in display_smartbond_configure()
164 ret = da1469x_lcdc_timings_configure(config->x_res, config->y_res, in display_smartbond_configure()
165 (lcdc_smartbond_timing_cfg *)&config->timing_cfg); in display_smartbond_configure()
[all …]
/Zephyr-latest/tests/drivers/i2c/i2c_ram/src/
Dtest_i2c_ram.c4 * SPDX-License-Identifier: Apache-2.0
41 * However... the address needs to be shifted into the lower 7 bits as
42 * Zephyr expects a 7bit device address and shifts this left to set the
58 if (ret != -ENOSYS) { in i2c_ram_setup()
75 addr += ARRAY_SIZE(tx_data) - TX_DATA_OFFSET; in i2c_ram_before()
189 wr_sqe->iodev_flags |= RTIO_IODEV_I2C_STOP; in ZTEST()
193 zassert_ok(wr_cqe->result, "i2c write should succeed"); in ZTEST()
207 wr_sqe->flags |= RTIO_SQE_TRANSACTION; in ZTEST()
208 rd_sqe->iodev_flags |= RTIO_IODEV_I2C_STOP | RTIO_IODEV_I2C_RESTART; in ZTEST()
213 zassert_ok(wr_cqe->result, "i2c write should succeed"); in ZTEST()
[all …]
/Zephyr-latest/arch/riscv/
DKconfig1 # Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
3 # SPDX-License-Identifier: Apache-2.0
13 bool "Hard-float calling convention"
17 This option enables the hard-float calling convention.
24 bool "RISC-V global pointer relative addressing"
31 Note: To support this feature, RISC-V SoC needs to initialize
51 This is for RISC-V implementations that require every mret to be
52 balanced with an ecall. This is not required by the RISC-V spec
57 prompt "RISC-V SMP IPI implementation"
63 bool "CLINT-based IPI"
[all …]
/Zephyr-latest/subsys/mgmt/ec_host_cmd/
Dec_host_cmd_handler.c4 * SPDX-License-Identifier: Apache-2.0
93 return (uint8_t)(-checksum); in cal_checksum()
146 return -EIO; in ec_host_cmd_add_suppressed()
198 struct ec_host_cmd_response_header *const tx_header = (void *)tx->buf; in send_status_response()
200 tx_header->prtcl_ver = 3; in send_status_response()
201 tx_header->result = status; in send_status_response()
202 tx_header->data_len = 0; in send_status_response()
203 tx_header->reserved = 0; in send_status_response()
204 tx_header->checksum = 0; in send_status_response()
205 tx_header->checksum = cal_checksum((uint8_t *)tx_header, TX_HEADER_SIZE); in send_status_response()
[all …]
/Zephyr-latest/drivers/spi/
Dspi_xec_qmspi_ldma.c4 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/clock/mchp_xec_pcr.h>
21 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
34 * received data is shifted off the input line(s) improperly. Received
35 * data bytes will be left shifted by 1. Work-around for SPI Mode 3 is
123 return -ETIMEDOUT; in xec_qmspi_spin_yield()
133 * Some QMSPI timing register may be modified by the Boot-ROM OTP
144 taps[0] = regs->TM_TAPS; in qmspi_reset()
145 taps[1] = regs->TM_TAPS_ADJ; in qmspi_reset()
146 taps[2] = regs->TM_TAPS_CTRL; in qmspi_reset()
[all …]
/Zephyr-latest/drivers/serial/
Duart_pl011.c6 * SPDX-License-Identifier: Apache-2.0
83 get_uart(dev)->cr |= PL011_CR_UARTEN; in pl011_enable()
88 get_uart(dev)->cr &= ~PL011_CR_UARTEN; in pl011_disable()
93 get_uart(dev)->lcr_h |= PL011_LCRH_FEN; in pl011_enable_fifo()
98 get_uart(dev)->lcr_h &= ~PL011_LCRH_FEN; in pl011_disable_fifo()
104 get_uart(dev)->cr |= PL011_CR_RTSEn; in pl011_set_flow_control()
106 get_uart(dev)->cr &= ~PL011_CR_RTSEn; in pl011_set_flow_control()
109 get_uart(dev)->cr |= PL011_CR_CTSEn; in pl011_set_flow_control()
111 get_uart(dev)->cr &= ~PL011_CR_CTSEn; in pl011_set_flow_control()
118 /* Avoiding float calculations, bauddiv is left shifted by 6 */ in pl011_set_baudrate()
[all …]
/Zephyr-latest/subsys/bluetooth/controller/
DKconfig.ll_sw_split3 # Copyright (c) 2016-2017 Nordic Semiconductor ASA
4 # SPDX-License-Identifier: Apache-2.0
120 # Hidden, Controller's Co-Operative high priority Rx thread stack size.
125 # Hidden, Controller's Co-Operative Rx thread stack size.
152 https://www.bluetooth.com/specifications/assigned-numbers/company-identifiers
168 Legacy Non-Directed Advertising mode.
180 zero-based numbering. When using with Zephyr host this option can be
233 module-str = "Bluetooth Controller ISO-AL"
237 bool "ISO-AL verbose debug logging"
241 Use this option to enable ISO-AL verbose debug logging.
[all …]
/Zephyr-latest/lib/os/
Dcbprintf_complete.c2 * Copyright (c) 1997-2010, 2012-2015 Wind River Systems, Inc.
5 * SPDX-License-Identifier: Apache-2.0
113 #define WCHAR_IS_SIGNED ((WCHAR_MIN - 0) != 0)
196 /** Left-justify value in width */
202 /** Space for non-negative sign */
226 * prec_value is set to the value of a non-negative argument.
254 /** Set for floating point values that have a non-zero
279 * For example for zero-padded hexadecimal integers
313 * unconsumed character. There must be at least one non-digit character in
324 val = 10U * val + *sp++ - '0'; in extract_decimal()
[all …]
/Zephyr-latest/arch/x86/core/intel64/
Dlocore.S3 * SPDX-License-Identifier: Apache-2.0
22 /* Long mode, no-execute, syscall */
25 /* Paging, write-protect */
75 /* Use 32-bit instructions due to assembler fussiness with large
85 .word __X86_TSS64_SIZEOF-1
92 /* The .locore section begins the page-aligned initialization region
96 * ACRN...) who hard-coded the address by inspecting _start on a
97 * non-SMP build.
108 * scribble over it with 8 0x90 bytes (which is the 1-byte NOP) and be
129 * First, we move to 32-bit protected mode, and set up the
[all …]