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/Zephyr-latest/dts/bindings/display/
Dsitronix,st7735r.yaml100 Display Inversion Control
101 Set dot inversion or line inversion for each normal/idle/partial mode.
103 inversion-on:
106 Enable Display Inversion
Dilitek,ili9xxx-common.yaml33 display-inversion:
36 Display inversion mode. Every bit is inverted from the frame memory to
Dgalaxycore,gc9x01x.yaml33 display-inversion;
54 display-inversion:
57 Display inversion mode. Every bit is inverted from the frame memory to
Dsitronix,st7789v.yaml60 inversion-off:
62 description: Inversion Off
Dsolomon,ssd1327fb.yaml48 inversion-on:
Dsolomon,ssd1306fb-common.yaml52 inversion-on:
Dilitek,ili9342c.yaml31 Display Inversion Control (INVTR) register value.
Dsitronix,st7796s.yaml106 Display inversion control mode.
/Zephyr-latest/drivers/display/
Ddisplay_st7796s.h12 #define ST7796S_CMD_INVOFF 0x20 /* Display inversion off */
13 #define ST7796S_CMD_INVON 0x21 /* Display inversion on */
25 #define ST7796S_CMD_DIC 0xB4 /* Display inversion control */
Ddisplay_gc9x01x.h18 #define GC9X01X_CMD_INVOFF 0x20U /* Display Inversion OFF */
19 #define GC9X01X_CMD_INVON 0x21U /* Display Inversion ON */
Ddisplay_nt35510.h32 #define NT35510_CMD_INVOFF 0x20 /* Display inversion off */
33 #define NT35510_CMD_INVON 0x21 /* Display inversion on */
Ddisplay_ili9xxx.h76 bool inversion; member
Ddisplay_gc9x01x.c39 bool inversion; member
450 /* Display inversion mode. */ in gc9x01x_configure()
451 if (config->inversion) { in gc9x01x_configure()
635 .inversion = DT_INST_PROP(inst, display_inversion), \
/Zephyr-latest/drivers/serial/
Duart_stm32.h40 /* enable rx pin inversion */
42 /* enable tx pin inversion */
50 /* enable de pin inversion */
/Zephyr-latest/dts/bindings/mipi-dbi/
Drenesas,smartbond-mipi-dbi.yaml27 te-inversion:
30 Boolean to apply an inversion on the TE signal that triggers the MIPI DBI controller.
/Zephyr-latest/dts/bindings/serial/
Dnxp,lpc11u6x-uart.yaml5 include: [uart-controller.yaml, uart-controller-pin-inversion.yaml, pinctrl-device.yaml]
Despressif,esp32-uart.yaml5 include: [uart-controller.yaml, uart-controller-pin-inversion.yaml, pinctrl-device.yaml]
Duart-controller-pin-inversion.yaml4 description: Pin Inversion fields for UART controllers
Dnxp,lpuart.yaml5 include: [uart-controller.yaml, uart-controller-pin-inversion.yaml, pinctrl-device.yaml]
Dst,stm32-uart-base.yaml13 - name: uart-controller-pin-inversion.yaml
/Zephyr-latest/include/zephyr/drivers/
Ddai.h42 /** Used to extract the clock inversion from the format attribute of struct dai_config */
76 /** @brief DAI clock inversion
83 /**< no BCLK inversion, no FSYNC inversion */
85 /**< no BCLK inversion, FSYNC inversion */
87 /**< BCLK inversion, no FSYNC inversion */
89 /**< BCLK inversion, FSYNC inversion */
/Zephyr-latest/boards/shields/seeed_xiao_round_display/
Dseeed_xiao_round_display.overlay48 display-inversion;
/Zephyr-latest/subsys/fs/fcb/
Dfcb_priv.h33 * binary inversion of fcb->f_erase_value to avoid it matching a 4 consecutive
/Zephyr-latest/boards/shields/ls0xx_generic/doc/
Dindex.rst48 | EXTCOMIN | VCOM Inversion Polarity Input (VCOM can be controlled |
54 | EXTMODE | COM Inversion Selection |
/Zephyr-latest/drivers/can/
Dcan_mcp2515.h15 /* Reduce the number of Tx buffers to 1 in order to avoid priority inversion. */

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