Searched full:ice40 (Results 1 – 11 of 11) sorted by relevance
| /Zephyr-latest/drivers/fpga/ |
| D | Kconfig.ice40 | 5 bool "Lattice iCE40 fpga driver"
12 Enable support for the Lattice iCE40 fpga driver.
17 bool "Lattice iCE40 fpga SPI driver"
21 Enable support for the Lattice iCE40 fpga SPI driver.
24 bool "Lattice iCE40 fpga driver GPIO bitbang"
29 Enable support for the Lattice iCE40 fpga GPIO bitbang driver.
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| D | fpga_ice40_bitbang.c | 22 * Note: When loading a bitstream, the iCE40 has a 'quirk' in that the CS
31 * and microprocessors, it's possible to do that without breaking the iCE40
35 * between SPI transfers does break the iCE40 timing requirements. That
39 * achieve the minimum 1 MHz clock rate for loading the iCE40 bistream. So
61 * lattice,ice40-fpga.yaml for details.
117 * See iCE40 Family Handbook, Appendix A. SPI Slave Configuration Procedure,
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| D | Kconfig | 31 source "drivers/fpga/Kconfig.ice40"
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| /Zephyr-latest/dts/bindings/fpga/ |
| D | lattice,ice40-fpga.yaml | 4 description: Lattice iCE40 FPGA SPI based driver
6 compatible: "lattice,ice40-fpga"
8 include: lattice,ice40-fpga-base.yaml
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| D | lattice,ice40-fpga-bitbang.yaml | 5 description: Lattice iCE40 FPGA GPIO bitbang based driver
7 compatible: "lattice,ice40-fpga-bitbang"
9 include: lattice,ice40-fpga-base.yaml
16 SPI Clock GPIO input on iCE40.
23 Peripheral-In Controller-Out GPIO input on iCE40.
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| D | lattice,ice40-fpga-base.yaml | 4 description: Lattice iCE40 FPGA base
6 compatible: "lattice,ice40-fpga-base"
15 Configuration Done output from iCE40.
22 Configuration Reset input on iCE40.
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| /Zephyr-latest/tests/drivers/build_all/fpga/ |
| D | spi.dtsi | 9 test_spi_fpga_ice40_gpio: ice40@0 {
11 compatible = "lattice,ice40-fpga-bitbang";
25 test_spi_fpga_ice40_spi: ice40@1 {
27 compatible = "lattice,ice40-fpga";
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| D | prj.conf | 11 # iCE40 FPGAs on a single bus to 1.
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| /Zephyr-latest/boards/others/icev_wireless/doc/ |
| D | index.rst | 6 The ICE-V Wireless is a combined ESP32C3 and iCE40 FPGA board.
24 For details on iCE40 hardware please refer to the following resources:
26 * `iCE40 UltraPlus Family Datasheet`_
61 The ICE-V Wireless provides 1 row of reference, ESP32-C3, and iCE40 signals
63 the iCE40 FPGA. Note that several of the iCE40 pins brought out to the PMOD
253 …https://www.latticesemi.com/-/media/LatticeSemi/Documents/DataSheets/iCE/iCE40-UltraPlus-Family-Da…
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-4.1.rst | 182 * Extracted from :dtcompatible:`lattice,ice40-fpga` the compatible and driver for
183 … :dtcompatible:`lattice,ice40-fpga-bitbang`. This replaces the original ``load_mode`` property from
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| D | release-notes-3.3.rst | 750 * Added preliminary support for the Lattice iCE40.
1321 - :dtcompatible:`lattice,ice40-fpga`
3585 * :github:`48317` - drivers: fpga: include driver for Lattice iCE40 parts
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