1CONFIG_TEST=y
2CONFIG_TEST_USERSPACE=y
3CONFIG_LOG=y
4CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
5CONFIG_GPIO=y
6CONFIG_SPI=y
7CONFIG_FPGA=y
8# Must disable pinctrl here because otherwise there is an error in
9# fpga_ice40.c here about the two nodes both declaring the same pinctrl data
10# of the common spi-bus parent. That effectively limits the number of
11# iCE40 FPGAs on a single bus to 1.
12CONFIG_PINCTRL=n
13CONFIG_ICE40_FPGA=y
14CONFIG_ALTERA_AGILEX_BRIDGE_FPGA=y
15CONFIG_ARM_SIP_SVC_DRIVER=y
16CONFIG_ARM_SIP_SVC_SUBSYS=y
17CONFIG_ARM_SIP_SVC_SUBSYS_SINGLY_OPEN=y
18CONFIG_HEAP_MEM_POOL_SIZE=16384
19