Searched full:hse (Results 1 – 25 of 76) sorted by relevance
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| /Zephyr-Core-2.7.6/dts/bindings/clock/ |
| D | st,stm32wl-hse-clock.yaml | 4 description: STM32WL HSE Clock
6 compatible: "st,stm32wl-hse-clock"
11 hse-tcxo:
15 When set, TCXO is selected as external source clock for HSE.
16 Otherwise, external cyrstal is selected as HSE source clock.
18 hse-div2:
22 When set HSE output clock is divided by 2.
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| D | st,stm32-hse-clock.yaml | 4 description: STM32 HSE Clock
6 compatible: "st,stm32-hse-clock"
11 hse-bypass:
15 HSE crystal oscillator bypass
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| D | st,stm32f1-pll-clock.yaml | 41 Otpional HSE divider for PLL entry
47 Otpional HSE divider for PLL entry
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| D | st,stm32f100-pll-clock.yaml | 8 When clk_hsi is used a fixed prescaler is applied. When input clock is hse or
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| D | st,stm32f105-pll-clock.yaml | 8 When clk_hsi is used a fixed prescaler is applied. When input clock is hse or
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| /Zephyr-Core-2.7.6/drivers/clock_control/ |
| D | Kconfig.stm32 | 31 int "HSE clock value"
35 Value of external high-speed clock (HSE). This symbol could be optionally
58 bool "HSE"
60 Use HSE as source of SYSCLK
87 bool "HSE bypass"
90 Enable this option to bypass external high-speed clock (HSE).
128 bool "HSE"
130 Use HSE as source of PLL
137 PLL2 as source PREDIV1SCR. If not selected, default source is HSE.
247 bool "HSE"
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| D | clock_stm32f1.c | 65 * PLLXPTRE (depends on PLL source HSE) in config_pll_init()
66 * HSE/2 used as PLL source in config_pll_init()
72 * PLLXPTRE (depends on PLL source HSE) in config_pll_init()
73 * HSE used as direct PLL source in config_pll_init()
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| D | Kconfig.stm32f1 | 9 bool "HSE to PLL /2 prescaler"
12 Enable this option to enable /2 prescaler on HSE to PLL clock signal
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| D | clock_stm32_ll_u5.c | 391 /* Switch to PLL with HSE as clock source */ in config_src_sysclk_pll()
407 * Configure HSE as source of SYSCLK
416 /* Calculate new SystemCoreClock variable based on HSE freq */ in config_src_sysclk_hse()
429 /* Enable HSE if not enabled */ in config_src_sysclk_hse()
431 /* Check if need to enable HSE bypass feature or not */ in config_src_sysclk_hse()
438 /* Enable HSE */ in config_src_sysclk_hse()
441 /* Wait for HSE ready */ in config_src_sysclk_hse()
445 /* Set HSE as SYSCLCK source */ in config_src_sysclk_hse()
578 /* Configure HSE as source of SYSCLK */ in stm32_clock_control_init()
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| D | Kconfig.stm32f0_f3 | 14 PREDIV is a PLL clock signal prescaler for the HSE output.
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| D | clock_stm32_ll_common.c | 506 /* Switch to PLL with HSE as clock source */ in stm32_clock_control_init()
528 /* Calculate new SystemCoreClock variable based on HSE freq */ in stm32_clock_control_init()
555 /* Enable HSE if not enabled */ in stm32_clock_control_init()
562 /* Check if need to enable HSE bypass feature or not */ in stm32_clock_control_init()
570 /* Enable HSE */ in stm32_clock_control_init()
573 /* Wait for HSE ready */ in stm32_clock_control_init()
577 /* Set HSE as SYSCLCK source */ in stm32_clock_control_init()
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| /Zephyr-Core-2.7.6/boards/shields/x_nucleo_iks02a1/boards/ |
| D | nucleo_f411re.defconfig | 13 # by the PLLI2S from either HSI or HSE osci using this formula:
15 # Fin = HSE or HSI osci
19 # For example, if Fin is HSE at 8MHz and PLLM=8, PLLN=192, PLLR=3,
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| /Zephyr-Core-2.7.6/dts/arm/seeed/ |
| D | lora-e5.dtsi | 12 hse-tcxo;
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| /Zephyr-Core-2.7.6/drivers/i2s/ |
| D | Kconfig.stm32 | 28 If not enabled the clock will be provided by HSI/HSE.
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| /Zephyr-Core-2.7.6/boards/arm/stm3210c_eval/ |
| D | stm3210c_eval.dts | 45 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f303re/ |
| D | nucleo_f303re.dts | 47 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f070rb/ |
| D | nucleo_f070rb.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_l073rz/ |
| D | nucleo_l073rz.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f302r8/ |
| D | nucleo_f302r8.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f411re/ |
| D | nucleo_f411re.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_h745zi_q/ |
| D | nucleo_h745zi_q_m7.dts | 49 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_l053r8/ |
| D | nucleo_l053r8.dts | 47 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f030r8/ |
| D | nucleo_f030r8.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f334r8/ |
| D | nucleo_f334r8.dts | 46 hse-bypass;
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| /Zephyr-Core-2.7.6/boards/arm/nucleo_f412zg/ |
| D | nucleo_f412zg.dts | 56 hse-bypass;
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