Searched full:hardwired (Results 1 – 12 of 12) sorted by relevance
72 Default mode set to 1, because in MAX22190PMB devkit this is hardwired
34 /* platform interrupt are hardwired or can be dynamically allocated. */296 /* In some platforms, PCI interrupts are hardwired to specific interrupt inputs in pcie_alloc_irq()
50 * @brief Hardwired device address
152 * support this bit, it is hardwired to 0.
131 * 1 is hardwired to ring 0, other slots must be different in xtensa_init_paging()
127 /* Check availability of sleep and enable pins, as these might be hardwired. */ in drv8424_enable()
10 Pi RP2040 and fully hardwired TCP/IP controller W5500 - and basically works
302 * Each dmamux channel is hardwired to one dma controllers dma channel.
686 * use a hardwired Vinput range selection instead. in schedule_and_start_adc_sequence()1213 /* Internal channels selection is hardwired */
408 * If Name path exist then PCI interrupts are configurable and are not hardwired to in acpi_legacy_irq_init()
1149 /* Max packet size for EP0 is hardwired to 8 */ in usb_init()
1557 * :github:`36769` - Zephyr assumes Interrupt Line config space register is RW, while ACRN hardwired…
