Searched +full:ethernet +full:- +full:phy (Results 1 – 25 of 216) sorted by relevance
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/Zephyr-latest/drivers/ethernet/phy/ |
D | Kconfig | 1 # Ethernet PHY drivers configuration options 3 # Copyright (c) 2021 IP-Logix Inc. 4 # SPDX-License-Identifier: Apache-2.0 7 bool "Ethernet PHY drivers" 12 module = PHY 13 module-dep = LOG 14 module-str = Log level for Ethernet PHY driver 15 module-help = Sets log level for Ethernet PHY Device Drivers. 17 source "drivers/ethernet/phy/Kconfig.tja1103" 18 source "drivers/ethernet/phy/Kconfig.dm8806" [all …]
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/Zephyr-latest/dts/bindings/ethernet/ |
D | davicom,dm8806-phy.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Davicom DM8806 Ethernet MAC and PHY with RMII interface 6 compatible: "davicom,dm8806-phy" 8 include: [ethernet-phy.yaml] 10 on-bus: mdio 16 5-bit PHY address for Internal PHY Registers group of Davicom DM8806 MAC 17 PHY Ethernet Switch Controller, separate for each MAC PHY, build in DM8806 18 and correlate with Ethenet port. DM8806 has five MAC PHY inside, but it is 20 communicate with all of them. Each MAC PHY has its own PHY address, which 22 concrete register in conrete MAC PHY acoring to Clause 22 MDIO [all …]
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D | nxp,kinetis-ethernet.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: NXP Kinetis Ethernet 6 compatible: "nxp,kinetis-ethernet" 8 include: ["ethernet-controller.yaml", "pinctrl-device.yaml"] 15 phy-addr: 17 description: Address of the phy controller 19 reset-gpios: 20 type: phandle-array 21 description: GPIO to reset PHY. Reset signal is assumed active low. 22 int-gpios: [all …]
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D | microchip,ksz8081.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Microchip KSZ8081 Ethernet PHY device 8 include: ethernet-phy.yaml 11 reset-gpios: 12 type: phandle-array 13 description: GPIO connected to PHY reset signal pin. Reset is active low. 14 int-gpios: 15 type: phandle-array 16 description: GPIO for interrupt signal indicating PHY state change. 17 microchip,interface-type: [all …]
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D | ti,dp83825.yaml | 1 # Copyright 2023-2024 NXP 2 # SPDX-License-Identifier: Apache-2.0 4 description: TI DP83825 Ethernet PHY device 8 include: ethernet-phy.yaml 11 reset-gpios: 12 type: phandle-array 13 description: GPIO connected to PHY reset signal pin. Reset is active low. 14 int-gpios: 15 type: phandle-array 16 description: GPIO for interrupt signal indicating PHY state change. [all …]
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D | realtek,rtl8211f.yaml | 1 # Copyright 2023-2024 NXP 2 # SPDX-License-Identifier: Apache-2.0 4 description: Realtek RTL8211F Ethernet PHY device 8 include: ethernet-phy.yaml 11 reset-gpios: 12 type: phandle-array 13 description: GPIO connected to PHY reset signal pin. Reset is active low. 14 int-gpios: 15 type: phandle-array 16 description: GPIO for interrupt signal indicating PHY state change.
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D | qca,ar8031.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Qualcomm Atheros AR8031 Ethernet PHY 8 include: ethernet-phy.yaml 11 eee-en: 14 Enable IEEE 802.3az Energy Efficient Ethernet which provides a mechanism
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D | silabs,gecko-ethernet.yaml | 3 # SPDX-License-Identifier: Apache-2.0 5 description: SiLabs Gecko Ethernet 7 compatible: "silabs,gecko-ethernet" 9 include: ethernet-controller.yaml 20 # PHY address 21 phy-address: 24 description: address of the PHY on the MDIO bus 27 location-rmii: 32 # PHY management interface location 33 location-mdio: [all …]
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D | nuvoton,numaker-ethernet.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Nuvoton, NuMaker Ethernet controller 6 compatible: "nuvoton,numaker-ethernet" 9 - ethernet-controller.yaml 10 - reset-device.yaml 11 - pinctrl-device.yaml 26 phy-addr: 28 description: Address of the phy controller
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D | ethernet-controller.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 # Common fields for Ethernet devices 9 local-mac-address: 10 type: uint8-array 13 zephyr,random-mac-address: 24 If set we ignore any setting of the local-mac-address property. 26 phy-handle: 29 Specifies a reference to a node representing a PHY device. 31 phy-connection-type: 34 Specifies the interface connection type between ethernet MAC and PHY. [all …]
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D | atmel,gmac-common.yaml | 2 # Copyright (c) 2020-2021 Gerson Fernando Budke <nandojve@gmail.com> 3 # SPDX-License-Identifier: Apache-2.0 6 - name: ethernet-controller.yaml 7 - name: pinctrl-device.yaml 13 phy-handle: 16 num-queues: 22 max-frame-size: 26 Maximum ethernet frame size. The current ethernet frame sizes 28 means that normally gmac will reject any frame above max-frame-size 30 IEEE 802.3 ethernet frame: [all …]
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D | adi,adin2111.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 ADIN2111 standalone 10BASE-T1L Ethernet controller with SPI interface. 12 spi-max-frequency = <25000000>; 13 int-gpios = <&gpioe 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 14 reset-gpios = <&gpioe 8 GPIO_ACTIVE_LOW>; 16 local-mac-address = [ CA 2F B7 10 23 63 ]; 19 local-mac-address = [ 3C 82 D4 A2 29 8E ]; 22 compatible = "adi,adin2111-mdio"; 24 #address-cells = <1>; 25 #size-cells = <0>; [all …]
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D | ethernet-phy.yaml | 1 # Copyright (c) 2021 IP-Logix Inc. 2 # SPDX-License-Identifier: Apache-2.0 6 description: Generic MII PHY 8 compatible: "ethernet-phy" 10 include: phy.yaml 15 description: PHY address 16 no-reset: 18 description: Do not reset the PHY during initialization 19 fixed-link: 21 description: This link is fixed and does not require PHY configuration [all …]
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D | renesas,ra-ethernet.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Renesas RA Ethernet 6 compatible: "renesas,ra-ethernet" 8 include: [ethernet-controller.yaml, pinctrl-device.yaml] 17 phy-handle:
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D | adi,adin1110.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 ADIN1110 standalone 10BASE-T1L Ethernet controller with SPI interface. 12 spi-max-frequency = <25000000>; 13 int-gpios = <&gpioe 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 14 reset-gpios = <&gpioe 8 GPIO_ACTIVE_LOW>; 16 local-mac-address = [ CA 2F B7 10 23 63 ]; 19 compatible = "adi,adin2111-mdio"; 21 #address-cells = <1>; 22 #size-cells = <0>; 23 ethernet-phy@1 { [all …]
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/Zephyr-latest/tests/drivers/build_all/ethernet/ |
D | app.overlay | 3 * SPDX-License-Identifier: Apache-2.0 8 #address-cells = <1>; 9 #size-cells = <1>; 13 gpio-controller; 15 #gpio-cells = <0x2>; 19 test_ethernet: ethernet { 20 compatible = "vnd,ethernet"; 23 compatible = "zephyr,mdio-gpio"; 24 mdc-gpios = <&test_gpio 0 0>; 25 mdio-gpios = <&test_gpio 0 0>; [all …]
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/Zephyr-latest/drivers/ethernet/nxp_enet/ |
D | Kconfig | 1 # NXP ENET ethernet drivers configuration options 3 # Copyright (c) 2016-2017 ARM Ltd 5 # SPDX-License-Identifier: Apache-2.0 16 bool "NXP ENET Ethernet driver" 24 Enable NXP ENET Ethernet driver. 27 bool "MCUX Ethernet driver" 35 Enable deprecated legacy MCUX Ethernet driver. 36 Note, this driver performs one shot PHY setup. 37 There is no support for PHY disconnect, reconnect or configuration change. 48 Enable the use of the ENET1G ethernet instance in 1G mode. [all …]
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/Zephyr-latest/boards/espressif/esp32_ethernet_kit/doc/ |
D | index.rst | 6 The ESP32-Ethernet-Kit is an Ethernet-to-Wi-Fi development board that enables 7 Ethernet devices to be interconnected over Wi-Fi. At the same time, to provide 8 more flexible power supply options, the ESP32-Ethernet-Kit also supports power 9 over Ethernet (PoE). 11 .. _get-started-esp32-ethernet-kit-v1.2-overview: 13 ESP32-Ethernet-Kit is an ESP32-WROVER-E based development. 14 For more information, check the datasheet at `ESP32-WROVER-E Datasheet`_. 16 It consists of two development boards, the Ethernet Board A and the PoE 17 board B. The `Ethernet Board (A)`_ contains Bluetooth/Wi-Fi dual-mode 18 ESP32-WROVER-E module and IP101GRI, a Single Port 10/100 Fast Ethernet [all …]
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/Zephyr-latest/boards/silabs/starter_kits/slstk3701a/ |
D | board.c | 5 * SPDX-License-Identifier: Apache-2.0 19 /* Enable the ethernet PHY power */ in efm32gg_stk3701a_init() 22 printk("Ethernet PHY power gpio port is not ready!\n"); in efm32gg_stk3701a_init() 23 return -ENODEV; in efm32gg_stk3701a_init() 29 /* Configure ethernet reference clock */ in efm32gg_stk3701a_init() 32 printk("Ethernet reference clock gpio port is not ready!\n"); in efm32gg_stk3701a_init() 33 return -ENODEV; in efm32gg_stk3701a_init() 42 CMU->CTRL |= CMU_CTRL_CLKOUTSEL2_HFXO; in efm32gg_stk3701a_init() 43 CMU->ROUTELOC0 = (CMU->ROUTELOC0 & ~_CMU_ROUTELOC0_CLKOUT2LOC_MASK) | in efm32gg_stk3701a_init() 45 CMU->ROUTEPEN |= CMU_ROUTEPEN_CLKOUT2PEN; in efm32gg_stk3701a_init() [all …]
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/Zephyr-latest/boards/espressif/esp32_ethernet_kit/ |
D | esp32_ethernet_kit_procpu.dts | 4 * SPDX-License-Identifier: Apache-2.0 6 /dts-v1/; 9 #include "esp32_ethernet_kit-pinctrl.dtsi" 13 model = "Espressif ESP32-Ethernet-Kit PROCPU"; 17 uart-0 = &uart0; 24 zephyr,shell-uart = &uart0; 26 zephyr,code-partition = &slot0_partition; 27 zephyr,bt-hci = &esp32_bt_hci; 33 current-speed = <115200>; 34 pinctrl-0 = <&uart0_default>; [all …]
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/Zephyr-latest/include/zephyr/net/ |
D | phy.h | 4 * @brief Public APIs for Ethernet PHY drivers. 8 * Copyright (c) 2021 IP-Logix Inc. 11 * SPDX-License-Identifier: Apache-2.0 17 * @brief Ethernet PHY Interface 18 * @defgroup ethernet_phy Ethernet PHY Interface 31 /** @brief Ethernet link speeds. */ 33 /** 10Base-T Half-Duplex */ 35 /** 10Base-T Full-Duplex */ 37 /** 100Base-T Half-Duplex */ 39 /** 100Base-T Full-Duplex */ [all …]
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/Zephyr-latest/dts/arm64/fvp/ |
D | fvp-aemv8r.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 7 #include <arm64/armv8-r.dtsi> 8 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "arm,cortex-r82"; 23 compatible = "arm,cortex-r82"; 29 compatible = "arm,cortex-r82"; 35 compatible = "arm,cortex-r82"; 41 compatible = "arm,armv8-timer"; [all …]
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/Zephyr-latest/samples/boards/nxp/s32/netc/ |
D | README.rst | 1 .. zephyr:code-sample:: nxp_s32_netc 10 for the different use-cases: 13 Ethernet PHY through EMDIO. 15 2. Zephyr application controls the PSI, Virtual SI 1, and the Ethernet PHY 18 The sample enables the net-shell and mdio-shell (only available when Zephyr 28 To run this sample is needed to set-up a host machine running GNU/Linux or Windows 29 with a network adapter connected to the target board ETH0 port through an Ethernet 35 To build and run the sample application for use-case 1: 37 .. zephyr-app-commands:: 38 :zephyr-app: samples/boards/nxp/s32/netc [all …]
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/Zephyr-latest/boards/nxp/s32z2xxdc2/ |
D | s32z2xxdc2_s32z270.dtsi | 2 * Copyright 2022-2024 NXP 4 * SPDX-License-Identifier: Apache-2.0 14 pinctrl-0 = <&emdio_default>; 15 pinctrl-names = "default"; 18 phy0: ethernet-phy@7 { 19 compatible = "ethernet-phy"; 26 local-mac-address = [00 00 00 01 02 00]; 27 pinctrl-0 = <ð0_default>; 28 pinctrl-names = "default"; 29 clock-frequency = <300000000>; [all …]
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/Zephyr-latest/drivers/ethernet/ |
D | Kconfig.stm32_hal | 1 # STM32 HAL Ethernet driver configuration options 5 # SPDX-License-Identifier: Apache-2.0 8 bool "STM32 HAL Ethernet driver" 19 Enable STM32 HAL based Ethernet driver. It is available for 20 all Ethernet enabled variants of the F2, F4, F7 and H7 series. 25 prompt "STM32Cube HAL Ethernet version" 49 int "STM32 Ethernet RX Thread Priority" 53 handles incoming Ethernet packets. 68 int "Phy address" 71 The phy address to use. [all …]
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