1# STM32 HAL Ethernet driver configuration options
2
3# Copyright (c) 2017 Erwin Rol <erwin@erwinrol.com>
4# Copyright (c) 2020 Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
5# SPDX-License-Identifier: Apache-2.0
6
7menuconfig ETH_STM32_HAL
8	bool "STM32 HAL Ethernet driver"
9	default y
10	depends on DT_HAS_ST_STM32_ETHERNET_ENABLED
11	select USE_STM32_HAL_ETH
12	select NOCACHE_MEMORY if SOC_SERIES_STM32H7X && CPU_CORTEX_M7
13	select HWINFO
14	select ETH_DSA_SUPPORT
15	select PINCTRL
16	select MDIO if SOC_SERIES_STM32H5X || SOC_SERIES_STM32H7X
17	imply CRC
18	help
19	  Enable STM32 HAL based Ethernet driver. It is available for
20	  all Ethernet enabled variants of the F2, F4, F7 and H7 series.
21
22if ETH_STM32_HAL
23
24choice ETH_STM32_HAL_API_VERSION
25	prompt "STM32Cube HAL Ethernet version"
26
27config ETH_STM32_HAL_API_V2
28	bool "Use official STM32Cube HAL driver"
29	depends on SOC_SERIES_STM32H7X || SOC_SERIES_STM32H5X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
30	help
31	  Use the official STM32Cube HAL driver instead of the legacy one.
32
33config ETH_STM32_HAL_API_V1
34	bool "Use legacy STM32Cube HAL driver"
35	depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F2X
36	help
37	  Driver version based on legacy HAL version as the current official API version.
38	  Available only for STM32F1 and STM32F2 SoC series.
39
40endchoice
41
42config ETH_STM32_HAL_RX_THREAD_STACK_SIZE
43	int "RX thread stack size"
44	default 1500
45	help
46	  RX thread stack size
47
48config ETH_STM32_HAL_RX_THREAD_PRIO
49	int "STM32 Ethernet RX Thread Priority"
50	default 2
51	help
52	  This option allows to configure the priority of the RX thread that
53	  handles incoming Ethernet packets.
54	  Switching between preemptive and cooperative scheduling can be done by
55	  NET_TC_THREAD_PREEMPTIVE.
56	  Preemptive scheduling can lead to more responsive handling of network traffic,
57	  especially under high load.
58
59config ETH_STM32_HAL_USE_DTCM_FOR_DMA_BUFFER
60	bool "Use DTCM for DMA buffers"
61	default y
62	depends on SOC_SERIES_STM32F7X
63	help
64	  When this option is activated, the buffers for DMA transfer are
65	  moved from SRAM to the DTCM (Data Tightly Coupled Memory).
66
67config ETH_STM32_HAL_PHY_ADDRESS
68	int "Phy address"
69	default 0
70	help
71	  The phy address to use.
72
73config ETH_STM32_HAL_MII
74	bool "Use MII interface"
75	help
76	  Use the MII physical interface instead of RMII.
77
78config ETH_STM32_CARRIER_CHECK_RX_IDLE_TIMEOUT_MS
79	int "Carrier check timeout period (ms)"
80	default 500
81	range 100 30000
82	help
83	  Set the RX idle timeout period in milliseconds after which the
84	  PHY's carrier status is re-evaluated.
85
86config ETH_STM32_AUTO_NEGOTIATION_ENABLE
87	bool "Autonegotiation mode"
88	default y
89	help
90	  Enable this if using autonegotiation
91
92config ETH_STM32_HW_CHECKSUM
93	bool "Use TX and RX hardware checksum"
94	depends on !SOC_SERIES_STM32H5X
95	help
96	  Enable receive and transmit checksum offload to enhance throughput
97	  performances.
98	  See reference manual for more information on this feature.
99
100if !ETH_STM32_AUTO_NEGOTIATION_ENABLE
101
102config ETH_STM32_SPEED_10M
103	bool "Set speed to 10 Mbps when autonegotiation is disabled"
104	help
105	  Set this if using 10 Mbps and when autonegotiation is disabled, otherwise speed
106	  is 100 Mbps
107
108config ETH_STM32_MODE_HALFDUPLEX
109	bool "Half duplex mode"
110	help
111	  Set this if using half duplex when autonegotiation is disabled otherwise
112	  duplex mode is full duplex
113
114endif # !ETH_STM32_AUTO_NEGOTIATION_ENABLE
115
116if SOC_SERIES_STM32F7X || SOC_SERIES_STM32H7X || SOC_SERIES_STM32H5X
117
118config PTP_CLOCK_STM32_HAL
119	bool "STM32 HAL PTP clock driver support"
120	default y
121	depends on PTP_CLOCK || NET_L2_PTP
122	help
123	  Enable STM32 PTP clock support.
124
125config ETH_STM32_HAL_PTP_CLOCK_SRC_HZ
126	int "Frequency of the clock source for the PTP timer"
127	default 50000000
128	depends on PTP_CLOCK_STM32_HAL
129	help
130	  Set the frequency in Hz sourced to the PTP timer.
131	  If the value is set properly, the timer will be accurate.
132
133config ETH_STM32_HAL_PTP_CLOCK_ADJ_MIN_PCT
134	int "Lower bound of clock frequency adjustment (in percent)"
135	default 90
136	depends on PTP_CLOCK_STM32_HAL
137	help
138	  Specifies lower bound of PTP clock rate adjustment.
139
140config ETH_STM32_HAL_PTP_CLOCK_ADJ_MAX_PCT
141	int "Upper bound of clock frequency adjustment (in percent)"
142	default 110
143	depends on PTP_CLOCK_STM32_HAL
144	help
145	  Specifies upper bound of PTP clock rate adjustment.
146
147config ETH_STM32_HAL_PTP_CLOCK_INIT_PRIO
148	int
149	default 85
150	depends on PTP_CLOCK_STM32_HAL
151	help
152	  STM32 PTP Clock initialization priority level. There is
153	  a dependency from the network stack that this device
154	  initializes before network stack (NET_INIT_PRIO).
155
156endif # SOC_SERIES_STM32F7X || SOC_SERIES_STM32H7X || SOC_SERIES_STM32H5X
157
158config ETH_STM32_MULTICAST_FILTER
159	bool "Multicast hash filter support"
160	help
161	  Enable support for multicast hash filtering in the MAC.
162	  Once enabled the ethernet MAC performs imperfect filtering
163	  based on a computed hash of the destination MAC address of
164	  the multicast address. Only multicast with the computed
165	  hash set in the multicast table will be received and all
166	  other multicast is dropped by the MAC. If disabled then all
167	  multicast is received by the MAC.
168
169endif # ETH_STM32_HAL
170