| /Zephyr-latest/dts/bindings/tcpc/ |
| D | nuvoton,numaker-tcpc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Nuvoton NuMaker USB Type-C port controller
6 compatible: "nuvoton,numaker-tcpc"
8 include: [base.yaml, reset-device.yaml, pinctrl-device.yaml]
23 vconn-overcurrent-event-polarity:
28 - "low-active"
29 - "high-active"
31 vconn-discharge-polarity:
36 - "low-active"
37 - "high-active"
[all …]
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| /Zephyr-latest/dts/bindings/mipi-dsi/ |
| D | st,stm32-mipi-dsi.yaml | 4 # SPDX-License-Identifier: Apache-2.0
9 compatible: "st,stm32-mipi-dsi"
11 include: [mipi-dsi-host.yaml, reset-device.yaml]
17 clock-names:
20 "dsiclk" DSI clock enable.
28 hs-active-high:
31 DSI host horizontal synchronization is active high.
33 vs-active-high:
36 DSI host vertical synchronization is active high.
38 de-active-high:
[all …]
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| /Zephyr-latest/dts/bindings/lora/ |
| D | semtech,sx127x-base.yaml | 3 # SPDX-License-Identifier: Apache-2.0
5 include: spi-device.yaml
8 reset-gpios:
9 type: phandle-array
14 This signal is open-drain, active-high (SX1272/3) or
15 active-low (SX1276/7/8/9) as interpreted by the modem.
17 dio-gpios:
18 type: phandle-array
23 These signals are normally active-high.
25 power-amplifier-output:
[all …]
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| D | semtech,sx126x-base.yaml | 3 # SPDX-License-Identifier: Apache-2.0
5 include: spi-device.yaml
8 reset-gpios:
9 type: phandle-array
13 This signal is open-drain, active-low as interpreted by the
16 busy-gpios:
17 type: phandle-array
21 antenna-enable-gpios:
22 type: phandle-array
24 Antenna power enable pin.
[all …]
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| /Zephyr-latest/include/zephyr/drivers/sensor/ |
| D | mcux_lpcmp.h | 5 * SPDX-License-Identifier: Apache-2.0
10 * @brief Data structure for the NXP MCUX low-power analog comparator (LPCMP)
50 * LPCMP internal DAC enable.
52 * 1b: enable
56 * LPCMP internal DAC high power mode disabled.
58 * 1b: enable
66 /** LPCMP internal filter sample enable. */
81 * 11b: set to high
85 * LPCMP COUT event to close an active window:
86 * xx0b: COUT event cannot close an active window
[all …]
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | lm77.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 include: [sensor-device.yaml, i2c-device.yaml]
12 int-gpios:
13 type: phandle-array
15 Identifies the INT signal, which is active-low open drain by default
18 int-inverted:
21 When present, the polarity on the INT signal is inverted (active-high).
23 tcrita-inverted:
27 (active-high).
29 enable-fault-queue:
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| D | bosch,bmi08x-accel.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 include: sensor-device.yaml
9 int-gpios:
10 type: phandle-array
16 int1-map-io:
23 int2-map-io:
30 int1-conf-io:
34 Bit[1]: if set to 1, INT1 is active high, otherwise it's active low
35 Bit[2]: if set to 1, INT1 is open-drain, otherwise it's push-pull
36 Bit[3]: if set to 1, enable INT1 as an output pin
[all …]
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| D | bosch,bmi08x-gyro.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 include: sensor-device.yaml
9 int-gpios:
10 type: phandle-array
16 int3-4-map-io:
22 Bit[7] will enable the data ready interrupt on INT4
24 int3-4-conf-io:
27 Bit[0]: if set to 1, INT3 is active high, otherwise it's active low
28 Bit[1]: if set to 1, INT3 is open-drain, otherwise it's push-pull
29 Bit[2]: if set to 1, INT4 is active high, otherwise it's active low
[all …]
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| D | st,lis2de12-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 When setting the accel-range, accel-odr, properties in a .dts or .dtsi
9 #include <zephyr/dt-bindings/sensor/lis2de12.h>
14 accel-range = <LIS2DE12_DT_FS_16G>;
15 accel-odr = <LIS2DE12_DT_ODR_AT_100Hz>;
18 include: sensor-device.yaml
21 int1-gpios:
22 type: phandle-array
26 This pin defaults to active high when produced by the sensor.
30 int2-gpios:
[all …]
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| D | ams,tmd2620.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 int-gpios:
12 type: phandle-array
15 The interrupt pin of TMD2620 is open-drain, active low.
17 as pull-up, active low.
19 proximity-gain:
24 - 1
25 - 2
26 - 4
[all …]
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| D | st,lis2mdl-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 irq-gpios:
8 type: phandle-array
11 This pin defaults to active high when produced by the sensor.
15 single-mode:
21 cancel-offset:
24 Set to enable the offset cancellation. Otherwise it would be
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| D | st,lis2du12-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 When setting the accel-range, accel-odr, properties in a .dts or .dtsi
9 #include <zephyr/dt-bindings/sensor/lis2du12.h>
14 accel-range = <LIS2DU12_DT_FS_16G>;
15 accel-odr = <LIS2DU12_DT_ODR_AT_50Hz>;
18 include: sensor-device.yaml
21 int1-gpios:
22 type: phandle-array
26 This pin defaults to active high when produced by the sensor.
30 int2-gpios:
[all …]
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| /Zephyr-latest/dts/bindings/misc/ |
| D | zephyr,modbus-serial.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,modbus-serial"
8 include: uart-device.yaml
11 de-gpios:
12 type: phandle-array
13 description: Driver enable pin.
15 Driver enable pin (DE) of the RS-485 transceiver.
17 as active high.
19 re-gpios:
20 type: phandle-array
[all …]
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| /Zephyr-latest/dts/bindings/display/panel/ |
| D | panel-timing.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 a panel under display-timings node. For example:
12 display-timings {
13 compatible = "zephyr,panel-timing";
14 hsync-len = <8>;
15 hfront-porch = <32>;
16 hback-porch = <32>;
17 vsync-len = <2>;
18 vfront-porch = <16>;
19 vback-porch = <14>;
[all …]
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| /Zephyr-latest/dts/bindings/input/ |
| D | cirque,pinnacle-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 data-ready-gpios:
8 type: phandle-array
11 which is active high when SW_DR or SW_CC are asserted. If connected
12 directly, the MCU pin should be configured as active low.
20 - "1x"
21 - "2x"
22 - "3x"
23 - "4x"
25 data-mode:
[all …]
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| /Zephyr-latest/dts/bindings/power-domain/ |
| D | power-domain-gpio.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "power-domain-gpio"
8 include: power-domain.yaml
11 enable-gpios:
12 type: phandle-array
15 GPIO to use to enable/disable the regulator.
18 provide the GPIO polarity and open-drain status in the phandle
19 selector. The Linux enable-active-high and gpio-open-drain
22 startup-delay-us:
27 off-on-delay-us:
[all …]
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| /Zephyr-latest/dts/bindings/w1/ |
| D | adi,max32-w1.yaml | 1 # Copyright (c) 2023-2024 Analog Devices, Inc.
2 # SPDX-License-Identifier: Apache-2.0
4 description: ADI MAX32xxx MCUs 1-Wire Master
6 include: [w1-master.yaml, pinctrl-device.yaml]
8 compatible: "adi,max32-w1"
20 pinctrl-0:
23 pinctrl-names:
26 internal-pullup:
31 Set this field to enable the internal pullup resistor.
32 0 - Internal pullup disabled.
[all …]
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| /Zephyr-latest/dts/bindings/regulator/ |
| D | regulator-fixed.yaml | 1 # Copyright 2019-2020 Peter Bigot Consulting, LLC
3 # SPDX-License-Identifier: Apache-2.0
8 - name: base.yaml
9 - name: regulator.yaml
10 property-allowlist:
11 - regulator-name
12 - regulator-boot-on
13 - regulator-always-on
14 - regulator-min-microvolt
15 - regulator-max-microvolt
[all …]
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| /Zephyr-latest/samples/drivers/i2s/echo/src/ |
| D | codec.c | 4 * SPDX-License-Identifier: Apache-2.0
31 * [6] CLKOUTPD = 1 (Enable Power Down) in init_wm8731_i2c()
33 * [4] OUTPD = 1 (Enable Power Down) in init_wm8731_i2c()
36 * [1] MICPD = 1 (Enable Power Down) in init_wm8731_i2c()
42 * [8] LRINBOTH = 1 (Enable Simultaneous Load) in init_wm8731_i2c()
44 * [4:0] LINVOL = 0x07 (-24 dB) in init_wm8731_i2c()
49 * [8] LRHPBOTH = 1 (Enable Simultaneous Load) in init_wm8731_i2c()
56 * [7:6] SIDEATT = 0 (-6 dB) in init_wm8731_i2c()
61 * [1] MUTEMIC = 1 (Enable Mute) in init_wm8731_i2c()
70 * [0] ADCHPD = 1 (Disable High Pass Filter) in init_wm8731_i2c()
[all …]
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | renesas,ra-pincrl-pfs.yaml | 2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/renesas/pinctrl-ra.h>
32 drive-strength = "medium";
42 particular state of a device; in this case, the default (that is, active)
50 pins, such as the 'input-enable' property in group 2. Here is a list of
53 - bias-disable: Disable pull-up/down (default, not required).
54 - bias-pull-up: Enable pull-up resistor.
55 - input-enable: Enable input from the pin.
[all …]
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| D | silabs,dbus-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
7 node to route USART0 RX to pin PA1 and enable the pull-up resistor on the
15 compatible = "silabs,gecko-usart";
16 pinctrl-0 = <&usart0_default>;
17 pinctrl-names = "default";
20 pinctrl-0 is a phandle that stores the pin settings for the peripheral, in
22 'pinctrl' node, typically in a board-pinctrl.dtsi file in the board
32 /* Configure GPIO to push-pull mode */
33 drive-push-pull;
34 /* Set DOUT high */
[all …]
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| D | renesas,rzt2m-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/renesas-rzt2m-pinctrl.h>
33 input-enable;
39 particular state of a device; in this case, the default (that is, active)
47 pins, such as the 'input-enable' property in group 2.
49 compatible: "renesas,rzt2m-pinctrl"
53 child-binding:
56 child-binding:
[all …]
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| /Zephyr-latest/dts/bindings/sdhc/ |
| D | nxp,imx-usdhc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx-usdhc"
8 include: [sdhc.yaml, pinctrl-device.yaml]
14 data-timeout:
20 read-watermark:
26 write-watermark:
41 pwr-gpios:
42 type: phandle-array
45 This pin defaults to active high when consumed by the SD card. The
49 cd-gpios:
[all …]
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| /Zephyr-latest/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_pin_interrupt.c | 4 * SPDX-License-Identifier: Apache-2.0
61 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in test_gpio_pin_interrupt_edge()
64 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_edge()
87 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_edge()
101 "number of times on rising/to active edge", i); in test_gpio_pin_interrupt_edge()
135 TC_PRINT("Running test on port=%s, pin=%d\n", port->name, TEST_PIN); in test_gpio_pin_interrupt_level()
138 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_level()
167 if (ret == -ENOTSUP) { in test_gpio_pin_interrupt_level()
191 /* Re-enable pin level interrupt */ in test_gpio_pin_interrupt_level()
194 "Failed to re-enable pin level interrupt"); in test_gpio_pin_interrupt_level()
[all …]
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| /Zephyr-latest/dts/bindings/display/ |
| D | ftdi,ft800.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 include: spi-device.yaml
11 irq-gpios:
12 type: phandle-array
21 will be 9.6 MHz. Must be positive value to enable the screen
35 Controls the transition of RGB signals with PCLK active clock
37 following the active edge of PCLK. When set to 1, R[7:2]
70 Number of lines for the high state of signal VSYNC at
100 description: Number of PCLK cycles of HSYNC high state during start of
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