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/Zephyr-latest/include/zephyr/drivers/serial/
Duart_async_to_irq.h17 * @brief UART Asynchronous to Interrupt driven API adaptation layer
43 * fulfill the requirement that UART interrupt driven API shall be called from
56 /** @brief Interrupt driven API initializer.
59 * driver to provide interrupt driven API functions.
118 /* @brief Enable RX for interrupt driven API.
128 /* @brief Disable RX for interrupt driven API.
203 /** @brief Data associated with the asynchronous to the interrupt driven API adaptation layer. */
205 /** User callback for interrupt driven API. */
227 /** Interrupt driven FIFO fill function. */
232 /** Interrupt driven FIFO read function. */
[all …]
/Zephyr-latest/dts/bindings/display/panel/
Dpanel-timing.yaml43 Horizontal synchronization pulse duration of panel driven by this
50 Vertical synchronization pulse duration of panel driven by this
57 Horizontal back porch duration of panel driven by this controller,
64 Vertical back porch duration of panel driven by this controller, in lines
70 Horizontal front porch duration of panel driven by this controller,
77 Vertical front porch duration of panel driven by this controller, in lines
/Zephyr-latest/dts/bindings/display/
Ddisplay-controller.yaml11 Height of the panel driven by the controller, with the units in pixels.
17 Width of the panel driven by the controller, with the units in pixels.
/Zephyr-latest/drivers/serial/
Duart_async_to_irq.c194 /** Interrupt driven FIFO read function */
252 /** Interrupt driven transfer enabling function */
258 /** Interrupt driven transfer disabling function */
264 /** Interrupt driven transfer ready function */
274 /** Interrupt driven receiver enabling function */
280 /** Interrupt driven receiver disabling function */
286 /** Interrupt driven transfer complete function */
292 /** Interrupt driven receiver ready function */
300 /** Interrupt driven error enabling function */
306 /** Interrupt driven error disabling function */
[all …]
DKconfig.altera_jtag18 Enabling this will disable poll_in and interrupt driven api.
/Zephyr-latest/dts/bindings/phy/
Dcan-transceiver-gpio.yaml14 GPIO to use to enable/disable the CAN transceiver. This GPIO is driven
21 GPIO to use to put the CAN transceiver into standby. This GPIO is driven
/Zephyr-latest/doc/hardware/peripherals/
Duart.rst22 With the Interrupt-driven API, possibly slow communication can happen in the
33 Interrupt-driven API and the Asynchronous API should NOT be used at
45 the interrupt-driven API or the asynchronous API can be used. Only enable the
75 Interrupt-driven API
/Zephyr-latest/drivers/i2c/
DKconfig.sam017 This enables DMA driven transactions for the I2C peripheral.
18 DMA driven mode requires fewer interrupts to handle the
DKconfig.gpio10 Enable software driven (bit banging) I2C support using GPIO pins
/Zephyr-latest/dts/bindings/gpio/
Dsemtech,sx1509b.yaml29 driven low.
36 driven high.
/Zephyr-latest/drivers/display/
DKconfig.nrf_led_matrix5 bool "LED matrix driven by GPIOs"
11 Enable driver for a LED matrix with rows and columns driven by
/Zephyr-latest/subsys/console/
DKconfig36 interrupt-driven operation and use busy-polling.
45 interrupt-driven operation and use busy-polling.
/Zephyr-latest/include/zephyr/drivers/uart/
Duart_internal.h80 /** Interrupt driven FIFO fill function */
87 /** Interrupt driven FIFO read function */
94 /** Interrupt driven transfer enabling function */
97 /** Interrupt driven transfer disabling function */
100 /** Interrupt driven transfer ready function */
103 /** Interrupt driven receiver enabling function */
106 /** Interrupt driven receiver disabling function */
109 /** Interrupt driven transfer complete function */
112 /** Interrupt driven receiver ready function */
115 /** Interrupt driven error enabling function */
[all …]
/Zephyr-latest/dts/bindings/input/
Dgpio-kbd-matrix.yaml43 When unselected, this pin will be either driven to inactive state or
50 If enabled, unselected column GPIOs will be driven to inactive state.
/Zephyr-latest/drivers/mdio/
DKconfig.gpio9 Enable software driven (bit banging) MDIO support using GPIO pins
/Zephyr-latest/boards/makerbase/mks_canable_v20/doc/
Dindex.rst58 The MKS CANable V2.0 system clock is driven by internal high speed oscillator.
59 By default system clock is driven by PLL clock at 160 MHz,
60 the PLL is driven by the 16 MHz high speed internal oscillator.
62 The FDCAN1 peripheral is driven by PLLQ, which has 80 MHz frequency.
/Zephyr-latest/boards/st/steval_fcu001v1/doc/
Dindex.rst56 The steval_fcu001v1 system clock can be driven by an internal or external oscillator,
57 as well as by the main PLL clock. By default, the system clock is driven by the PLL clock at 84MHz,
58 driven by a 16MHz high-speed external clock.
/Zephyr-latest/drivers/spi/
DKconfig.smartbond17 Enables using the DMA engine instead of interrupt-driven
DKconfig.gd3219 Enable the interrupt driven mode for SPI instances
/Zephyr-latest/samples/basic/servo_motor/dts/bindings/
Dpwm-servo.yaml4 description: PWM-driven servo motor.
/Zephyr-latest/doc/services/rtio/
Dindex.rst15 driven I/O. This section covers the RTIO API, queues, executor, iodev,
25 An application wishing to do complex DMA or interrupt driven operations today
37 Using DMA and/or interrupt driven I/O shouldn't dictate whether or not the
52 This model maps well to DMA and interrupt driven transfers. A request to do a
54 to the way hardware typically works with interrupt driven state machines
119 effect every io device can be viewed as an independent, event driven actor like
/Zephyr-latest/include/zephyr/console/
Dtty.h37 * "tty" device provides support for buffered, interrupt-driven,
39 * completeness, it also support non-interrupt-driven, busy-polling
48 * interrupt-driven operation)
/Zephyr-latest/drivers/sdhc/
DKconfig.rcar38 bool "Internal DMA IRQ driven support for Renesas Rcar MMC driver"
/Zephyr-latest/boards/st/stm32l4r9i_disco/doc/
Dindex.rst38 The STM32L4R9AI System Clock can be driven by an internal or external oscillator,
39 as well as by the main PLL clock. By default, the System clock is driven by
40 the PLL clock at 120MHz. PLL clock is driven by a 4MHz medium speed internal clock.
/Zephyr-latest/boards/fanke/fk750m1_vbt6/doc/
Dindex.rst71 The FK750M1-VBT6 System Clock could be driven by an internal or external oscillator,
72 as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 480MHz,
73 driven by an 25MHz external crystal oscillator.

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