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/Zephyr-latest/dts/bindings/i3c/
Dst,stm32-i3c.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "st,stm32-i3c"
9 include: [i3c-controller.yaml, pinctrl-device.yaml, reset-device.yaml]
18 pinctrl-names:
26 Optional DMA channel specifier, required for DMA transactions.
28 dma-names:
30 DMA channel name. If DMA should be used, expected value is "rx" "tx" "tc" "rs".
33 dma-names = "rx", "tx", "tc", "rs";
/Zephyr-latest/samples/drivers/i2s/echo/boards/
Desp32s3_devkitc_procpu.overlay4 * SPDX-License-Identifier: Apache-2.0
14 output-enable;
23 output-enable;
27 input-enable;
35 pinctrl-0 = <&i2s0_pinconf>;
36 pinctrl-names = "default";
38 dmas = <&dma 3>;
39 dma-names = "tx";
45 pinctrl-0 = <&i2s1_pinconf>;
46 pinctrl-names = "default";
[all …]
/Zephyr-latest/dts/bindings/qspi/
Dst,stm32-qspi.yaml2 # SPDX-License-Identifier: Apache-2.0
9 pinctrl-0 = <&quadspi_clk_pe10 &quadspi_ncs_pe11
14 dma-names = "tx_rx";
19 compatible: "st,stm32-qspi"
21 include: [base.yaml, pinctrl-device.yaml]
32 pinctrl-0:
35 pinctrl-names:
40 Optional DMA channel specifier. If DMA should be used, specifier should
41 hold a phandle reference to the dma controller (not the DMAMUX even if present),
43 (depending on the type of DMA: 'features' is optional)
[all …]
/Zephyr-latest/dts/bindings/mmc/
Dst,stm32-sdmmc.yaml3 compatible: "st,stm32-sdmmc"
5 include: [mmc.yaml, pinctrl-device.yaml, reset-device.yaml]
17 pinctrl-0:
20 pinctrl-names:
23 cd-gpios:
24 type: phandle-array
27 pwr-gpios:
28 type: phandle-array
31 bus-width:
38 - 1
[all …]
/Zephyr-latest/dts/bindings/spi/
Datmel,sam-spi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "atmel,sam-spi"
9 - name: spi-controller.yaml
10 - name: pinctrl-device.yaml
30 TX & RX dma specifiers. Each specifier will have a phandle
31 reference to the dma controller, the channel number, and peripheral
38 dma-names:
43 For example using the example dmas, an example dma-names would be
44 dma-names = "tx", "rx";
Dinfineon,xmc4xxx-spi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "infineon,xmc4xxx-spi"
8 include: [spi-controller.yaml, pinctrl-device.yaml]
14 miso-src:
23 - "DX0A"
24 - "DX0B"
25 - "DX0C"
26 - "DX0D"
27 - "DX0E"
28 - "DX0F"
[all …]
Datmel,sam0-spi.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "atmel,sam0-spi"
9 - name: spi-controller.yaml
10 - name: pinctrl-device.yaml
19 clock-names:
34 Optional TX & RX dma specifiers. Each specifier will have a phandle
41 dma-names:
47 dma-names = "tx", "rx";
/Zephyr-latest/dts/common/broadcom/
Dviper-common.dtsi4 * SPDX-License-Identifier: Apache-2.0
17 clock-frequency = <25000000>;
18 reg-shift = <2>;
25 clock-frequency = <100000000>;
26 reg-shift = <2>;
31 compatible = "arm,dma-pl330";
34 reg-names = "pl330_regs",
37 dma-channels = <8>;
38 #dma-cells = <1>;
43 #address-cells = <2>;
[all …]
/Zephyr-latest/include/zephyr/devicetree/
Ddma.h3 * @brief DMA Devicetree macro public API header file.
9 * SPDX-License-Identifier: Apache-2.0
20 * @defgroup devicetree-dmas Devicetree DMA API
26 * @brief Get the node identifier for the DMA controller from a
31 * dma1: dma@... { ... };
33 * dma2: dma@... { ... };
47 * @return the node identifier for the DMA controller referenced at
54 * @brief Get the node identifier for the DMA controller from a
59 * dma1: dma@... { ... };
61 * dma2: dma@... { ... };
[all …]
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dsamr21_xpro.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
16 /* Configure DMA channels for async operation */
18 dma-names = "rx", "tx";
23 compatible = "atmel,sam0-uart";
24 current-speed = <115200>;
26 /* Internally loop-back TX and RX on PAD0 */
30 /* PAD0 must be configured to allow working loop-back */
31 pinctrl-0 = <&sercom3_loopback>;
32 pinctrl-names = "default";
34 /* Configure DMA channels for async operation */
[all …]
Dsamr34_xpro.overlay2 * SPDX-License-Identifier: Apache-2.0
12 /* configure DMA channels for async operation */
14 dma-names = "rx", "tx";
26 compatible = "atmel,sam0-uart";
27 current-speed = <115200>;
29 /* internally loop-back Tx and Rx on PAD0 */
33 /* configure DMA channels for async operation */
35 dma-names = "rx", "tx";
37 /* PAD0 must be configured to allow working loop-back */
38 pinctrl-0 = <&sercom2_default>;
[all …]
Desp32s3_devkitm_procpu.overlay4 * SPDX-License-Identifier: Apache-2.0
14 bias-pull-up;
21 current-speed = <115200>;
22 pinctrl-0 = <&uart1_test>;
23 pinctrl-names = "default";
24 dmas = <&dma 0>, <&dma 1>;
25 dma-names = "rx", "tx";
28 &dma {
Desp32s3_luatos_core_procpu.overlay4 * SPDX-License-Identifier: Apache-2.0
14 bias-pull-up;
21 current-speed = <115200>;
22 pinctrl-0 = <&uart1_test>;
23 pinctrl-names = "default";
24 dmas = <&dma 0>, <&dma 1>;
25 dma-names = "rx", "tx";
28 &dma {
Desp32c3_luatos_core.overlay4 * SPDX-License-Identifier: Apache-2.0
11 input-enable;
15 output-enable;
22 current-speed = <115200>;
23 pinctrl-0 = <&uart1_test>;
24 pinctrl-names = "default";
25 dmas = <&dma 0>, <&dma 1>;
26 dma-names = "rx", "tx";
29 &dma {
Dttgo_t8c3.overlay4 * SPDX-License-Identifier: Apache-2.0
11 input-enable;
15 output-enable;
22 current-speed = <115200>;
23 pinctrl-0 = <&uart1_test>;
24 pinctrl-names = "default";
25 dmas = <&dma 0>, <&dma 1>;
26 dma-names = "rx", "tx";
29 &dma {
Dsamc21n_xpro.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
8 /* Internally loop-back TX and RX on PAD0 */
12 /* Configure DMA channels for async operation */
14 dma-names = "rx", "tx";
22 /* configure DMA channels for async operation */
24 dma-names = "rx", "tx";
Dsamd21_xpro.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
12 /* Internally loop-back TX and RX on PAD0 */
16 /* Configure DMA channels for async operation */
18 dma-names = "rx", "tx";
22 /* configure DMA channels for async operation */
24 dma-names = "rx", "tx";
Dsame54_xpro.overlay1 /* SPDX-License-Identifier: Apache-2.0 */
9 compatible = "atmel,sam0-uart";
10 current-speed = <115200>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 /* Internally loop-back TX and RX on PAD0 */
18 /* Configure DMA channels for async operation */
20 dma-names = "rx", "tx";
24 /* configure DMA channels for async operation */
26 dma-names = "rx", "tx";
Desp32c3_luatos_core_esp32c3_usb.overlay5 * SPDX-License-Identifier: Apache-2.0
12 input-enable;
16 output-enable;
23 current-speed = <115200>;
24 pinctrl-0 = <&uart1_test>;
25 pinctrl-names = "default";
26 dmas = <&dma 0>, <&dma 1>;
27 dma-names = "rx", "tx";
30 &dma {
Desp32c6_devkitc.overlay4 * SPDX-License-Identifier: Apache-2.0
11 input-enable; /* Connect GPIO2 and GPIO3 externally for testing */
15 output-enable; /* Connect GPIO2 and GPIO3 externally for testing */
22 current-speed = <115200>;
23 pinctrl-0 = <&uart1_test>;
24 pinctrl-names = "default";
25 dmas = <&dma 0>, <&dma 1>;
26 dma-names = "rx", "tx";
29 &dma {
/Zephyr-latest/dts/bindings/i2s/
Dnxp,mcux-i2s.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP mcux SAI-I2S controller
6 compatible: "nxp,mcux-i2s"
8 include: [i2s-controller.yaml, pinctrl-device.yaml]
17 dma-names:
20 nxp,tx-dma-channel:
23 description: tx dma channel number
25 nxp,rx-dma-channel:
28 description: rx dma channel number
30 nxp,tx-sync-mode:
[all …]
/Zephyr-latest/tests/drivers/uart/uart_async_api/socs/
Desp32c3.overlay4 * SPDX-License-Identifier: Apache-2.0
11 input-enable;
15 output-enable;
22 current-speed = <115200>;
23 pinctrl-0 = <&uart1_test>;
24 pinctrl-names = "default";
25 dmas = <&dma 0>, <&dma 1>;
26 dma-names = "rx", "tx";
29 &dma {
/Zephyr-latest/dts/bindings/i2c/
Datmel,sam0-i2c.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "atmel,sam0-i2c"
9 - name: i2c-controller.yaml
10 - name: pinctrl-device.yaml
22 clock-names:
27 Optional TX & RX dma specifiers. Each specifier will have a phandle
34 dma-names:
40 dma-names = "tx", "rx";
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S3x_common.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv8-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
14 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
[all …]
/Zephyr-latest/dts/bindings/base/
Dbase.yaml10 - "ok" # Deprecated form
11 - "okay"
12 - "disabled"
13 - "reserved"
14 - "fail"
15 - "fail-sss"
18 type: string-array
26 reg-names:
27 type: string-array
34 # Does not follow the 'type: phandle-array' scheme, but gets type-checked
[all …]

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