Searched full:cyclic (Results 1 – 25 of 45) sorted by relevance
12
9 * @brief Verify zephyr dma memory to memory cyclic transfer12 * -# Set dma configuration for cyclic configuration67 dma_cfg.cyclic = 1; in test_cyclic()81 TC_PRINT("Configuring cyclic transfer on channel %d\n", chan_id); in test_cyclic()88 TC_PRINT("Starting cyclic transfer on channel %d and waiting for first block to complete\n", in test_cyclic()136 TC_PRINT("Finished: DMA Cyclic test\n"); in test_cyclic()
38 bool "Use Cyclic Redundancy Check (CRC)"41 Use Cyclic Redundancy Check (CRC) to verify the integrity of
2 drivers.dma.cyclic:
4 mainmenu "DMA Cyclic Test"
5 project(cyclic) project
8 # using select SPI at this point introduces a cyclic dependency
5 bool "Cyclic redundancy check (CRC) Support"
111 * - in the context of cyclic buffers we introduce158 * context of cyclic buffers. If this behaviour is199 /* type of the channel (PRODUCER/CONSUMER) - only applicable to cyclic213 /* cyclic buffer size - currently, this is set to head_block's size */215 /* set to true if the channel uses a cyclic buffer configuration */346 /* this function is used in cyclic buffer configurations. What it does386 /* this function is used in cyclic buffer configurations. What it does
31 bool cyclic; member
237 config->cyclic) { in dma_xmc4xxx_config()239 LOG_ERR("Multi-block, cyclic and gather/scatter only supported on DMA0 on " in dma_xmc4xxx_config()282 if (config->block_count == 1 && config->cyclic == 0) { in dma_xmc4xxx_config()318 } else if (config->cyclic) { in dma_xmc4xxx_config()324 if (i < config->block_count - 1 || config->cyclic) { in dma_xmc4xxx_config()
123 if (!stream->cyclic) { in dma_stm32_irq_handler()314 stream->cyclic = false; in dma_stm32_configure()364 stream->cyclic = config->head_block->source_reload_en; in dma_stm32_configure()436 if (stream->cyclic) { in dma_stm32_configure()498 if (stream->cyclic) { in dma_stm32_configure()
276 /* Assuming not cyclic transfer */ in dma_stm32_irq_handler()277 if (stream->cyclic == false) { in dma_stm32_irq_handler()504 /* Initialize the DMA structure in non-cyclic mode only */ in dma_stm32_configure()506 } else {/* cyclic mode */ in dma_stm32_configure()516 stream->cyclic = true; in dma_stm32_configure()
90 bool cyclic; member91 /* These parameters are for cyclic mode only.219 if (data->transfer_settings.cyclic) { in nxp_edma_callback()382 data->transfer_settings.cyclic = config->cyclic; in dma_mcux_edma_configure()430 if (config->cyclic) { in dma_mcux_edma_configure()650 if (data->transfer_settings.cyclic) { in dma_mcux_edma_reload()
30 bool cyclic; member
341 if (!channel->cyclic) { in bdma_stm32_irq_handler()555 channel->cyclic = config->head_block->source_reload_en; in bdma_stm32_configure()636 if (channel->cyclic) { in bdma_stm32_configure()670 if (channel->cyclic) { in bdma_stm32_configure()
189 if (cfg->cyclic > 1) { in dma_si32_config()190 LOG_ERR("Cyclic transfer not implemented"); in dma_si32_config()
130 if (dma_cfg->cyclic) { in dma_wch_config()174 if (dma_cfg->cyclic) { in dma_wch_config()
13 /** DMA cyclic mode config on bit 5*/
73 Enable STM32Cube Cyclic redundancy check calculation unit (CRC) HAL79 Enable STM32Cube Extended Cyclic redundancy check calculation unit673 Enable STM32Cube Cyclic redundancy check calculation unit (CRC) LL
17 -bit 5 : DMA cyclic mode config
23 -bit 5 : DMA cyclic mode config
110 Enable GD32 Cyclic redundancy check calculation unit (CRC) HAL
110 dma_cfg.cyclic = 1; in config_output_dma()150 dma_cfg_rx.cyclic = 1; in config_input_dma()
16 WINDOWBASE. The register file is cyclic, so for example if NREGS==64
