Searched +full:cpu2 +full:- +full:prescaler (Results 1 – 13 of 13) sorted by relevance
/Zephyr-latest/dts/bindings/clock/ |
D | st,stm32wl-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 For more description confere st,stm32-rcc.yaml 8 compatible: "st,stm32wl-rcc" 11 - name: st,stm32wb-rcc.yaml 12 property-blocklist: 13 - ahb4-prescaler 14 - cpu2-prescaler 17 cpu2-prescaler: 20 - 1 21 - 2 [all …]
|
D | st,stm32wb-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 For more description confere st,stm32-rcc.yaml 8 compatible: "st,stm32wb-rcc" 11 - name: st,stm32-rcc.yaml 12 property-blocklist: 13 - ahb-prescaler 16 cpu1-prescaler: 20 - 1 21 - 2 22 - 3 [all …]
|
D | st,stm32h7-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 14 "clock-frequency" property. 16 prescaler properties. 20 clock-frequency = <DT_FREQ_M(480)>; /* SYSCLK runs at 480MHz */ 29 Confere st,stm32-rcc binding for information about domain clocks configuration. 31 compatible: "st,stm32h7-rcc" 33 include: [clock-controller.yaml, base.yaml] 39 "#clock-cells": 42 clock-frequency: 52 - 1 [all …]
|
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
D | wb_i2c1_sysclk_lptim1_lsi.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
|
D | wl_i2c1_sysclk_lptim1_lsi.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
|
D | wb_i2c1_hsi_lptim1_lse.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
|
D | wl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
|
/Zephyr-latest/boards/st/stm32wb5mmg/ |
D | stm32wb5mmg.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wb/stm32wb55vgyx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/input/input-event-codes.h> 18 zephyr,shell-uart = &usart1; 19 zephyr,bt-mon-uart = &lpuart1; 20 zephyr,bt-c2h-uart = &lpuart1; 23 zephyr,code-partition = &slot0_partition; 47 clock-frequency = <DT_FREQ_M(32)>; 48 cpu1-prescaler = <1>; [all …]
|
/Zephyr-latest/boards/st/stm32wb5mm_dk/ |
D | stm32wb5mm_dk.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wb/stm32wb55vgyx-pinctrl.dtsi> 10 #include <zephyr/dt-bindings/input/input-event-codes.h> 11 #include <zephyr/dt-bindings/led/led.h> 12 #include <zephyr/dt-bindings/sensor/ism330dhcx.h> 16 compatible = "st,stm32wb5mm-dk"; 20 zephyr,shell-uart = &usart1; 21 zephyr,bt-mon-uart = &lpuart1; 22 zephyr,bt-c2h-uart = &lpuart1; [all …]
|
/Zephyr-latest/boards/st/nucleo_wl55jc/ |
D | nucleo_wl55jc.dts | 2 * Copyright (c) 2020-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wl/stm32wl55jcix-pinctrl.dtsi> 12 #include <zephyr/dt-bindings/input/input-event-codes.h> 15 model = "STMicroelectronics STM32WL55JC-NUCLEO board"; 16 compatible = "st,stm32wl55-nucleo"; 20 zephyr,shell-uart = &lpuart1; 23 zephyr,code-partition = &slot0_partition; 27 compatible = "gpio-leds"; [all …]
|
/Zephyr-latest/boards/st/nucleo_wb55rg/ |
D | nucleo_wb55rg.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wb/stm32wb55rgvx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/input/input-event-codes.h> 14 model = "STMicroelectronics STM32WB55RG-NUCLEO board"; 15 compatible = "st,stm32wb55rg-nucleo"; 19 zephyr,shell-uart = &usart1; 20 zephyr,bt-mon-uart = &lpuart1; 21 zephyr,bt-c2h-uart = &lpuart1; 24 zephyr,code-partition = &slot0_partition; [all …]
|
/Zephyr-latest/dts/riscv/andes/ |
D | andes_v5_ae350.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 8 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 19 compatible = "andestech,andescore-v5", "riscv"; 24 mmu-type = "riscv,sv32"; 25 clock-frequency = <60000000>; [all …]
|
/Zephyr-latest/doc/releases/ |
D | release-notes-3.3.rst | 14 * Introduced :ref:`USB-C <usbc_api>` device stack with PD (power delivery) 17 CMSIS-DSP as the default backend. 30 * CVE-2023-0359: Under embargo until 2023-04-20 32 * CVE-2023-0779: Under embargo until 2023-04-22 66 removed in favor of new :dtcompatible:`zephyr,flash-disk` devicetree binding. 71 * Starting from this release ``zephyr-`` prefixed tags won't be created 82 image states). Use of a truncated hash or non-sha256 hash will still work 88 registration function at boot-up. If applications register this then 93 application code, these will now automatically be registered at boot-up (this 129 This may cause out-of-tree scripts or commands to fail if they have relied [all …]
|