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/hal_atmel-3.6.0/asf/common/components/wifi/winc1500/driver/source/
Dm2m_wifi.c320 /* Check for incoming pointer */ in m2m_validate_ap_parameters()
327 /* Check for SSID */ in m2m_validate_ap_parameters()
334 /* Check for Channel */ in m2m_validate_ap_parameters()
341 /* Check for DHCP Server IP address */ in m2m_validate_ap_parameters()
351 /* Check for Security */ in m2m_validate_ap_parameters()
358 /* Check for WEP Key index */ in m2m_validate_ap_parameters()
365 /* Check for WEP Key size */ in m2m_validate_ap_parameters()
384 /* Check for WPA Key size */ in m2m_validate_ap_parameters()
405 /* Check for incoming pointer */ in m2m_validate_scan_options()
412 /* Check for valid No of slots */ in m2m_validate_scan_options()
[all …]
Dnmuart.c61 * @brief Check COM Port
252 //check for the ack from the SAMD21 for the packet reception. in nm_uart_write_reg()
322 //check for the ack from the SAMD21 for the packet reception. in nm_uart_read_block()
410 //check for the ack from the SAMD21 for the packet reception. in nm_uart_write_block()
429 //check for the ack from the SAMD21 for the payload reception. in nm_uart_write_block()
515 //check for the ack from the SAMD21 for the packet reception. in nm_uart_reconfigure()
Dnmuart.h49 * @brief Check COM Port
Dnmdrv.c247 …TODO:reset the chip and halt the cpu in case of no wait efuse is set (add the no wait effuse check) in nm_drv_init_download_mode()
/hal_atmel-3.6.0/asf/common/components/wifi/winc1500/driver/include/
Dm2m_ota.h126 * Set the OTA notification server URL, the functions need to be called before any check for update
134 … Set the OTA notification server URL, the functions need to be called before any check for update.
147 * Synchronous function to check for the OTA update using the Notification Server
169 * Schedule OTA notification Server check for update request after specific number of days
308 …Request OTA Roll-back to the old (other) WINC image, the WINC firmware will check the validation o…
330 …-back to the old (other) cortus application image, the WINC firmware will check the validation of …
/hal_atmel-3.6.0/asf/sam/include/sam4e/component/
Dcrccu.h34 /** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */
36 /** \addtogroup SAM4E_CRCCU Cyclic Redundancy Check Calculation Unit */
94 …R_CRC_Msk (0xffffffffu << CRCCU_SR_CRC_Pos) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */
/hal_atmel-3.6.0/asf/sam/include/sam4s/component/
Dcrccu.h34 /** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */
36 /** \addtogroup SAM4S_CRCCU Cyclic Redundancy Check Calculation Unit */
95 …R_CRC_Msk (0xffffffffu << CRCCU_SR_CRC_Pos) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */
/hal_atmel-3.6.0/asf/sam/include/sam4l/instance/
Dtwis0.h39 #define REG_TWIS0_PECR (0x40018414) /**< \brief (TWIS0) Packet Error Check Register */
56 #define REG_TWIS0_PECR (*(RoReg *)0x40018414UL) /**< \brief (TWIS0) Packet Error Check
Dtwis1.h39 #define REG_TWIS1_PECR (0x4001C414) /**< \brief (TWIS1) Packet Error Check Register */
56 #define REG_TWIS1_PECR (*(RoReg *)0x4001C414UL) /**< \brief (TWIS1) Packet Error Check
/hal_atmel-3.6.0/.github/
Dlicense_config.yml9 check: false
/hal_atmel-3.6.0/asf/sam/include/sam3x/instance/
Demac.h53 …#define REG_EMAC_FCSE (0x400B0050U) /**< \brief (EMAC) Frame Check Sequence Erro…
99 …#define REG_EMAC_FCSE (*(__IO uint32_t*)0x400B0050U) /**< \brief (EMAC) Frame Check Sequence Erro…
/hal_atmel-3.6.0/asf/sam/include/sam4l/component/
Dtwis.h197 /* -------- TWIS_PECR : (TWIS Offset: 0x14) (R/ 32) Packet Error Check Register -------- */
208 #define TWIS_PECR_OFFSET 0x14 /**< \brief (TWIS_PECR offset) Packet Error Check
209 …SETVALUE _U_(0x00000000); /**< \brief (TWIS_PECR reset_value) Packet Error Check Register */
693 __I uint32_t PECR; /**< \brief Offset: 0x14 (R/ 32) Packet Error Check Register */
Dcrccu.h243 uint32_t CRC:32; /*!< bit: 0..31 Cyclic Redundancy Check Value */
252 #define CRCCU_SR_CRC_Pos 0 /**< \brief (CRCCU_SR) Cyclic Redundancy Check Val…
/hal_atmel-3.6.0/asf/sam/include/sam3x/component/
Demac.h67 …__IO uint32_t EMAC_FCSE; /**< \brief (Emac Offset: 0x50) Frame Check Sequence Errors …
248 /* -------- EMAC_FCSE : (EMAC Offset: 0x50) Frame Check Sequence Errors Register -------- */
250 #define EMAC_FCSE_FCSE_Msk (0xffu << EMAC_FCSE_FCSE_Pos) /**< \brief (EMAC_FCSE) Frame Check Sequen…
/hal_atmel-3.6.0/asf/common/components/wifi/winc1500/spi_flash/include/
Dspi_flash_map.h237 /* Check if total size of content
/hal_atmel-3.6.0/asf/sam/include/sam4e/instance/
Dgmac.h103 #define REG_GMAC_FCSE (0x40034190U) /**< \brief (GMAC) Frame Check Sequence Errors Re…
195 #define REG_GMAC_FCSE (*(RoReg*)0x40034190U) /**< \brief (GMAC) Frame Check Sequence Errors Re…
/hal_atmel-3.6.0/asf/common/components/wifi/winc1500/socket/source/
Dsocket.c873 /* Check the timeout value. */ in recv()
971 /* Check the timeout value. */ in recvfrom()
1291 Enable/Disable TLS Certificate Expiration Check.
/hal_atmel-3.6.0/asf/sam0/include/same53/instance/
Dgmac.h117 #define REG_GMAC_FCSE (0x42000990) /**< \brief (GMAC) Frame Check Sequence Errors Regi…
229 #define REG_GMAC_FCSE (*(RoReg *)0x42000990UL) /**< \brief (GMAC) Frame Check Sequenc…
/hal_atmel-3.6.0/asf/sam0/include/same54/instance/
Dgmac.h117 #define REG_GMAC_FCSE (0x42000990) /**< \brief (GMAC) Frame Check Sequence Errors Regi…
229 #define REG_GMAC_FCSE (*(RoReg *)0x42000990UL) /**< \brief (GMAC) Frame Check Sequenc…
/hal_atmel-3.6.0/asf/sam/include/same70/
Dsame70j19.h156 ICM_IRQn = 32 , /**< 32 SAME70J19 Integrity Check Monitor (ICM) */
242 void* pfnICM_Handler; /* 32 SAME70J19 Integrity Check Monitor (ICM) */
526 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */
Dsame70j20.h156 ICM_IRQn = 32 , /**< 32 SAME70J20 Integrity Check Monitor (ICM) */
242 void* pfnICM_Handler; /* 32 SAME70J20 Integrity Check Monitor (ICM) */
526 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */
Dsame70j21.h156 ICM_IRQn = 32 , /**< 32 SAME70J21 Integrity Check Monitor (ICM) */
242 void* pfnICM_Handler; /* 32 SAME70J21 Integrity Check Monitor (ICM) */
526 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */
/hal_atmel-3.6.0/asf/sam/include/samv71/
Dsamv71j19.h156 ICM_IRQn = 32 , /**< 32 SAMV71J19 Integrity Check Monitor (ICM) */
243 void* pfnICM_Handler; /* 32 SAMV71J19 Integrity Check Monitor (ICM) */
530 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */
Dsamv71j20.h157 ICM_IRQn = 32 , /**< 32 SAMV71J20 Integrity Check Monitor (ICM) */
244 void* pfnICM_Handler; /* 32 SAMV71J20 Integrity Check Monitor (ICM) */
536 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */
Dsamv71j21.h157 ICM_IRQn = 32 , /**< 32 SAMV71J21 Integrity Check Monitor (ICM) */
244 void* pfnICM_Handler; /* 32 SAMV71J21 Integrity Check Monitor (ICM) */
536 #define ID_ICM ( 32) /**< \brief Integrity Check Monitor (ICM) */

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