| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/ |
| D | set.middleware.usb.yml | 1 ---
3 section-type: component
7 cc-include:
8 - repo_relative_path: output/npw/dcd_config/phydcd
11 - usb_phydcd_config.h
14 - source: middleware/usb/output/npw/dcd_config/phydcd/usb_phydcd_config.h
20 - source: middleware/usb/middleware_usb_phydcd_config_header.cmake
37 meta-name: middleware.usb.phydcd_config_header
40 section-type: component
44 cc-include:
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/ |
| D | CMSIS_v2.yml | 1 ---
4 section-type: component
6 - cmsis.core_cm.support
8 repo_base_path: CMSIS/Core/Include
10 cc-include:
11 - repo_relative_path: "./"
13 - source: cmsis_armcc.h
14 - source: cmsis_armclang.h
15 - source: cmsis_armclang_ltm.h
16 - source: cmsis_compiler.h
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| D | CMSIS.yml | 1 ---
3 section-type: component
4 meta-name: platform.Include_common
7 - source: CMSIS/Include/cmsis_armcc.h
8 virtual-dir: CMSIS
9 - source: CMSIS/Include/cmsis_armclang.h
10 virtual-dir: CMSIS
11 - source: CMSIS/Include/cmsis_armclang_ltm.h
12 virtual-dir: CMSIS
13 - source: CMSIS/Include/cmsis_gcc.h
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| /hal_nxp-latest/mcux/mcux-sdk/components/osa/ |
| D | set.component.osa.yml | 1 ---
3 section-type: set
22 - scr.component.osa
31 - scr.component.osa
38 section-type: scr
44 - license.bsd-3
48 Origin: NXP (BSD-3-Clause)
51 section-type: component
55 cc-include:
56 - repo_relative_path: "./"
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/RTOS2/RTX/Source/ |
| D | rtx_core_cm.h | 2 * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
18 * -----------------------------------------------------------------------------
20 * Project: CMSIS-RTOS RTX
21 * Title: Cortex-M Core definitions
23 * -----------------------------------------------------------------------------
31 #include "RTE_Components.h"
33 #include CMSIS_device_header
36 #include <stdbool.h>
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| D | rtx_core_ca.h | 2 * Copyright (c) 2013-2021 Arm Limited. All rights reserved.
4 * SPDX-License-Identifier: Apache-2.0
10 * www.apache.org/licenses/LICENSE-2.0
18 * -----------------------------------------------------------------------------
20 * Project: CMSIS-RTOS RTX
21 * Title: Cortex-A Core definitions
23 * -----------------------------------------------------------------------------
31 #include "RTE_Components.h"
33 #include CMSIS_device_header
36 #include <stdbool.h>
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_TIMERS.h | 2 * Copyright 1997-2016 Freescale Semiconductor, Inc.
3 * Copyright 2016-2024 NXP
5 * SPDX-License-Identifier: BSD-3-Clause
11 * @date 2024-05-03
21 * @page misra_violations MISRA-C:2012 violations
32 * Violates MISRA 2012 Advisory Directive 4.9, Function-like macro
33 * These are generated macros used for accessing the bit-fields from registers.
60 #include "S32Z2_COMMON.h"
62 /* ----------------------------------------------------------------------------
63 -- TIMERS Peripheral Access Layer
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| /hal_nxp-latest/mcux/mcux-sdk/components/rtt/template/ |
| D | SEGGER_RTT_Conf.h | 6 * (c) 1995 - 2021 SEGGER Microcontroller GmbH *
20 * compatible with the RTT protocol and J-Link. *
49 ---------------------------END-OF-HEADER------------------------------
51 Purpose : Implementation of SEGGER real-time transfer (RTT) which
52 allows real-time communication on targets which support
62 #include <intrinsics.h>
73 // Take in and set to correct values for Cortex-A systems with CPU cache
80 // Up-channel 0: RTT
81 // Up-channel 1: SystemView
84 #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this tar…
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/host/ |
| D | usb_host_ohci.c | 6 * SPDX-License-Identifier: BSD-3-Clause
9 #include "usb_host_config.h"
11 #include "usb_host.h"
12 #include "usb_host_hci.h"
13 #include "fsl_device_registers.h"
14 #include "usb_host_ohci.h"
15 #include "usb_host_devices.h"
51 /* The hcca for interrupt tansaction, 256-byte alignment*/
67 if (0U == usbHostState->isrLevel) in USB_HostOhciDisableIsr()
69 NVIC_DisableIRQ((IRQn_Type)usbHostState->isrNumber); in USB_HostOhciDisableIsr()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/elemu/ |
| D | fsl_elemu.c | 2 * Copyright 2019-2024 NXP
5 * SPDX-License-Identifier: BSD-3-Clause
8 #include "fsl_elemu.h"
22 #include "fsl_sss_mgmt.h"
23 #include "fsl_sss_sscp.h"
24 #include "fsl_sscp_mu.h"
40 uint32_t payload[ELEMU_TR_COUNT - MU_MSG_HEADER_SIZE];
46 while ((mu->TSR & mask) == 0u) in ELEMU_mu_hal_send_data()
49 mu->TR[regid] = *data; in ELEMU_mu_hal_send_data()
56 while ((mu->RSR & mask) == 0u) in ELEMU_mu_hal_receive_data()
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| /hal_nxp-latest/mcux/mcux-sdk/middleware/mmcau/ |
| D | set.middleware.mmcau.yml | 1 ---
3 section-type: component
8 - source: middleware/mmcau/ChangeLogKSDK.txt
13 - source: middleware/mmcau/README.txt
18 - source: middleware/mmcau/asm-cm0p/src/cau2_defines.hdr
20 repo_relative_path: asm-cm0p/src
21 project_relative_path: asm-cm0p/src
22 package_relative_path: asm-cm0p/src
24 - source: middleware/mmcau/asm-cm0p/src/mmcau_aes_functions.s
26 repo_relative_path: asm-cm0p/src
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/sdu/ |
| D | fsl_sdioslv_sdu.h | 5 * SPDX-License-Identifier: BSD-3-Clause
11 #include "fsl_common.h"
12 #include "cis_table.h"
293 uint32_t Card_PKT_END_RADDR; /*!< 0x1CC/2CC.../7CC */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/ |
| D | drv_edma_soc.yml | 1 ---
7 cc-include:
8 - repo_relative_path: "./"
10 - source: fsl_edma_soc.h
11 - source: fsl_edma_soc.c
13 - driver.common
14 section-type: component
|
| /hal_nxp-latest/mcux/middleware/wifi_nxp/cli/ |
| D | cli_utils.c | 5 * Copyright 2008-2024 NXP
7 * SPDX-License-Identifier: BSD-3-Clause
14 #include <string.h>
15 #include <stdlib.h>
16 #include <wm_utils.h>
17 #include <cli_utils.h>
18 #include <ctype.h>
19 #include <wm_net.h> /* for errno */
42 chr -= '0'; in hexc2bin()
46 chr -= ('A' - 10); in hexc2bin()
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| /hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/ |
| D | cmsis_iccarm.h | 8 //------------------------------------------------------------------------------
10 // Copyright (c) 2017-2019 IAR Systems
11 // Copyright (c) 2017-2019 Arm Limited. All rights reserved.
16 // http://www.apache.org/licenses/LICENSE-2.0
24 //------------------------------------------------------------------------------
228 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
289 #include "iccarm_builtin.h"
317 // without main extensions, the non-secure MSPLIM is RAZ/WI
327 // without main extensions, the non-secure PSPLIM is RAZ/WI
343 // without main extensions, the non-secure MSPLIM is RAZ/WI
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/ |
| D | fsl_clock.h | 2 * Copyright 2021-2022 NXP
5 * SPDX-License-Identifier: BSD-3-Clause
11 #include "fsl_common.h"
25 * and disable clock in de-initialize function. When set to 1, peripheral
216 /* ----------------------------- System layer clock -------------------------------*/
233 * These options are for MRCC->XX[CC]
250 * These options are for MRCC->XX[MUX].
677 * source and re-enable it. in CLOCK_SetIpSrc()
710 * source and re-enable it. in CLOCK_SetIpSrcDiv()
801 CLOCK_REG(&SCG0->RCCR) = scgSysClkConfig.u32; in CLOCK_SetRunModeSysClkConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/ |
| D | fsl_clock.h | 2 * Copyright 2021-2022 NXP
5 * SPDX-License-Identifier: BSD-3-Clause
11 #include "fsl_common.h"
25 * and disable clock in de-initialize function. When set to 1, peripheral
216 /* ----------------------------- System layer clock -------------------------------*/
233 * These options are for MRCC->XX[CC]
250 * These options are for MRCC->XX[MUX].
677 * source and re-enable it. in CLOCK_SetIpSrc()
710 * source and re-enable it. in CLOCK_SetIpSrcDiv()
801 CLOCK_REG(&SCG0->RCCR) = scgSysClkConfig.u32; in CLOCK_SetRunModeSysClkConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/ |
| D | MCXW716C.h | 12 ** Version: rev. 1.0, 2024-03-21
18 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
19 ** Copyright 2016-2024 NXP
20 ** SPDX-License-Identifier: BSD-3-Clause
26 ** - rev. 1.0 (2024-03-21)
35 * @date 2024-03-21
51 /* ----------------------------------------------------------------------------
52 -- Interrupt vector numbers
53 ---------------------------------------------------------------------------- */
65 NotAvail_IRQn = -128, /**< Not available device specific interrupt */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/ |
| D | MCXW716A.h | 12 ** Version: rev. 1.0, 2024-03-21
18 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
19 ** Copyright 2016-2024 NXP
20 ** SPDX-License-Identifier: BSD-3-Clause
26 ** - rev. 1.0 (2024-03-21)
35 * @date 2024-03-21
51 /* ----------------------------------------------------------------------------
52 -- Interrupt vector numbers
53 ---------------------------------------------------------------------------- */
65 NotAvail_IRQn = -128, /**< Not available device specific interrupt */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/ |
| D | LPC802.h | 15 ** Version: rev. 1.0, 2018-01-09
21 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
22 ** Copyright 2016-2020 NXP
25 ** SPDX-License-Identifier: BSD-3-Clause
31 ** - rev. 1.0 (2018-01-09)
40 * @date 2018-01-09
56 /* ----------------------------------------------------------------------------
57 -- Interrupt vector numbers
58 ---------------------------------------------------------------------------- */
70 NotAvail_IRQn = -128, /**< Not available device specific interrupt */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/ |
| D | LPC812.h | 14 ** Version: rev. 1.2, 2017-06-08
20 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
21 ** Copyright 2016-2020 NXP
24 ** SPDX-License-Identifier: BSD-3-Clause
30 ** - rev. 1.0 (2016-08-12)
32 ** - rev. 1.1 (2016-11-25)
35 ** - rev. 1.2 (2017-06-08)
46 * @date 2017-06-08
62 /* ----------------------------------------------------------------------------
63 -- Interrupt vector numbers
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/ |
| D | LPC811.h | 10 ** Version: rev. 1.2, 2017-06-08
16 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
17 ** Copyright 2016-2020 NXP
20 ** SPDX-License-Identifier: BSD-3-Clause
26 ** - rev. 1.0 (2016-08-12)
28 ** - rev. 1.1 (2016-11-25)
31 ** - rev. 1.2 (2017-06-08)
42 * @date 2017-06-08
58 /* ----------------------------------------------------------------------------
59 -- Interrupt vector numbers
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/ |
| D | LPC810.h | 10 ** Version: rev. 1.2, 2017-06-08
16 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
17 ** Copyright 2016-2020 NXP
20 ** SPDX-License-Identifier: BSD-3-Clause
26 ** - rev. 1.0 (2016-08-12)
28 ** - rev. 1.1 (2016-11-25)
31 ** - rev. 1.2 (2017-06-08)
42 * @date 2017-06-08
58 /* ----------------------------------------------------------------------------
59 -- Interrupt vector numbers
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/ |
| D | LPC804.h | 15 ** Version: rev. 1.0, 2018-01-09
21 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
22 ** Copyright 2016-2020 NXP
25 ** SPDX-License-Identifier: BSD-3-Clause
31 ** - rev. 1.0 (2018-01-09)
40 * @date 2018-01-09
56 /* ----------------------------------------------------------------------------
57 -- Interrupt vector numbers
58 ---------------------------------------------------------------------------- */
70 NotAvail_IRQn = -128, /**< Not available device specific interrupt */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/ |
| D | LPC832.h | 10 ** Version: rev. 1.1, 2018-02-25
16 ** Copyright 1997-2016 Freescale Semiconductor, Inc.
17 ** Copyright 2016-2020 NXP
20 ** SPDX-License-Identifier: BSD-3-Clause
26 ** - rev. 1.0 (2018-02-09)
28 ** - rev. 1.1 (2018-02-25)
37 * @date 2018-02-25
53 /* ----------------------------------------------------------------------------
54 -- Interrupt vector numbers
55 ---------------------------------------------------------------------------- */
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|
