| /Zephyr-latest/include/zephyr/arch/ |
| D | cache.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * Public APIs for architectural cache controller drivers
16 * @brief Cache Controller Interface
17 * @defgroup cache_arch_interface Cache Controller Interface
23 #include <zephyr/arch/arm64/cache.h>
25 #include <zephyr/arch/xtensa/cache.h>
31 * @brief Enable the d-cache
33 * Enable the data cache.
40 * @brief Disable the d-cache
42 * Disable the data cache.
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | cache.h | 4 * SPDX-License-Identifier: Apache-2.0
9 * Public APIs for external cache controller drivers
18 * @brief External Cache Controller Interface
19 * @defgroup cache_external_interface External Cache Controller Interface
31 * @brief Enable the d-cache
33 * Enable the data cache.
38 * @brief Disable the d-cache
40 * Disable the data cache.
45 * @brief Flush the d-cache
47 * Flush the whole data cache.
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| /Zephyr-latest/include/zephyr/ |
| D | cache.h | 5 * SPDX-License-Identifier: Apache-2.0
13 * @brief cache API interface
25 #include <zephyr/drivers/cache.h>
28 #include <zephyr/arch/cache.h>
33 * @defgroup cache_interface Cache Interface
48 * @brief Enable the d-cache
50 * Enable the data cache
61 * @brief Disable the d-cache
63 * Disable the data cache
74 * @brief Enable the i-cache
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| /Zephyr-latest/dts/riscv/starfive/ |
| D | jh7110-visionfive-v2.dtsi | 5 * SPDX-License-Identifier: Apache-2.0
8 #include "jh7110-clk.dtsi"
9 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
28 cpu0_intc: interrupt-controller {
29 compatible = "riscv,cpu-intc";
30 interrupt-controller;
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| D | starfive_jh7100_beagle_v.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
13 compatible = "sifive,freedom-u74-arty";
14 model = "sifive,freedom-u74-arty";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 compatible = "starfive,fu74-g000";
21 clock-frequency = <0>;
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| /Zephyr-latest/soc/espressif/esp32s2/ |
| D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0
17 menu "Cache config"
20 prompt "Instruction cache line size"
32 prompt "Instruction cache size"
36 bool "8KB instruction cache size"
39 bool "16KB instruction cache size"
44 prompt "Data cache size"
47 Data cache size to be set on application startup.
59 prompt "Data cache line size"
81 endmenu # Cache config
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| /Zephyr-latest/soc/espressif/esp32s3/ |
| D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0
17 menu "Cache config"
20 prompt "Instruction cache size"
23 Instruction cache size to be set on application startup.
24 If you use 16KB instruction cache rather than 32KB instruction cache,
39 prompt "Instruction cache associated ways"
42 Instruction cache associated ways to be set on application startup.
56 prompt "Instruction cache line size"
59 Instruction cache line size to be set on application startup.
74 bool "Define instruction cache wrap mode"
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| /Zephyr-latest/drivers/cache/ |
| D | cache_nrf.c | 4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/drivers/cache.h>
44 static inline bool is_cache_busy(NRF_CACHE_Type *cache) in is_cache_busy() argument
47 return nrf_cache_busy_check(cache); in is_cache_busy()
53 static inline void wait_for_cache(NRF_CACHE_Type *cache) in wait_for_cache() argument
55 while (is_cache_busy(cache)) { in wait_for_cache()
59 static inline int _cache_all(NRF_CACHE_Type *cache, enum k_nrf_cache_op op) in _cache_all() argument
62 * We really do not want to invalidate the whole cache. in _cache_all()
65 return -ENOTSUP; in _cache_all()
68 wait_for_cache(cache); in _cache_all()
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| D | cache_andes_l2.h | 4 * SPDX-License-Identifier: Apache-2.0
16 /* L2 cache Register Offset */
26 /* L2 cache config registers bitfields */
31 /* L2 cache control registers bitfields */
36 /* L2 cache CCTL Access Line registers bitfields */
52 uint32_t size; member
86 if (!l2_cache_cfg.size) { in nds_l2_cache_all()
87 return -ENOTSUP; in nds_l2_cache_all()
88 } else if (l2_cache_cfg.size >= 128 * 1024) { in nds_l2_cache_all()
97 return -ENOTSUP; in nds_l2_cache_all()
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| /Zephyr-latest/subsys/fs/ |
| D | Kconfig.littlefs | 4 # SPDX-License-Identifier: Apache-2.0
31 int "Minimum size of a block read"
37 int "Minimum size of a block program"
43 int "Size of block caches in bytes"
46 Each cache buffers a portion of a block in RAM. The littlefs
47 needs a read cache, a program cache, and one additional cache
51 device, and a factor of the block size.
54 int "Size of lookahead buffer in bytes"
67 is moved to another block. Set to a non-positive value to
73 int "Enable flexible file cache sizes for littlefs"
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| /Zephyr-latest/subsys/fs/zms/ |
| D | Kconfig | 3 #SPDX-License-Identifier: Apache-2.0
16 bool "ZMS lookup cache"
18 Enable ZMS cache to reduce the ZMS data lookup time.
19 Each cache entry holds an address of the most recent allocation
20 table entry (ATE) for all ZMS IDs that fall into that cache position.
23 int "ZMS Storage lookup cache size"
28 Number of entries in ZMS lookup cache.
30 Every additional entry in cache will add 8 bytes in RAM
38 bool "Customize the size of the buffer used internally for reads and writes"
41 Increasing the size of this buffer should be done carefully in order to not
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| /Zephyr-latest/dts/bindings/cpu/ |
| D | cpu.yaml | 2 # SPDX-License-Identifier: Apache-2.0
9 clock-frequency:
12 cpu-power-states:
15 i-cache-line-size:
17 description: i-cache line size
18 d-cache-line-size:
20 description: d-cache line size
21 enable-method:
23 description: Enable method for cpu, either it is "psci" or "spin-table"
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| /Zephyr-latest/subsys/net/lib/dns/ |
| D | dns_cache.c | 4 * SPDX-License-Identifier: Apache-2.0
12 static void dns_cache_clean(struct dns_cache const *cache);
14 int dns_cache_flush(struct dns_cache *cache) in dns_cache_flush() argument
16 k_mutex_lock(cache->lock, K_FOREVER); in dns_cache_flush()
17 for (size_t i = 0; i < cache->size; i++) { in dns_cache_flush()
18 cache->entries[i].in_use = false; in dns_cache_flush()
20 k_mutex_unlock(cache->lock); in dns_cache_flush()
25 int dns_cache_add(struct dns_cache *cache, char const *query, struct dns_addrinfo const *addrinfo, in dns_cache_add() argument
32 if (cache == NULL || query == NULL || addrinfo == NULL || ttl == 0) { in dns_cache_add()
33 return -EINVAL; in dns_cache_add()
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| D | dns_cache.h | 2 * @brief DNS cache
4 * An cache holding dns records for faster dns resolving.
10 * SPDX-License-Identifier: Apache-2.0
29 size_t size; member
37 * The cache can be accessed outside the module where it is defined using:
41 * @param name Name of the cache.
47 .entries = name##_entries, .size = cache_size, .lock = &name##_mutex};
50 * @brief Flushes the dns cache removing all its entries.
52 * @param cache Cache to be flushed
56 int dns_cache_flush(struct dns_cache *cache);
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| /Zephyr-latest/arch/arc/core/ |
| D | cache.c | 1 /* cache.c - d-cache support for ARC CPUs */
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief d-cache manipulation
13 * This module contains functions for manipulation of the d-cache.
20 #include <zephyr/cache.h>
21 #include <zephyr/linker/linker-defs.h>
32 #define DC_CTRL_DC_ENABLE 0x0 /* enable d-cache */
33 #define DC_CTRL_DC_DISABLE 0x1 /* disable d-cache */
34 #define DC_CTRL_INVALID_ONLY 0x0 /* invalid d-cache only */
35 #define DC_CTRL_INVALID_FLUSH 0x40 /* invalid and flush d-cache */
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| /Zephyr-latest/subsys/net/l2/ieee802154/ |
| D | ieee802154_6lo_fragment.c | 4 * SPDX-License-Identifier: Apache-2.0
37 * Reassemble cache : Depends on cache size it used for reassemble
43 uint16_t size; /* Datagram size */ member
48 static struct frag_cache cache[REASS_CACHE_SIZE]; variable
61 * Functionality is comprised of link-local IPv6 addresses and stateless
64 * LE's link-layer fragmentation support.
70 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
72 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
76 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
78 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| /Zephyr-latest/arch/arm/core/cortex_a_r/ |
| D | Kconfig | 1 # ARM Cortex-A and Cortex-R platform configuration options
7 # SPDX-License-Identifier: Apache-2.0
14 # exposed if one selects a different ARM Cortex Family (Cortex-M).
21 This option signifies the use of a Cortex-A9 CPU.
31 int "Undefined Instruction and Abort stack size (in bytes)"
34 This option specifies the size of the stack used by the undefined
38 int "FIQ stack size (in bytes)"
41 This option specifies the size of the stack used by the FIQ handler.
44 int "SVC stack size (in bytes)"
47 This option specifies the size of the stack used by the SVC handler.
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| D | cache.c | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Cortex-A/R AArch32 L1-cache maintenance operations.
11 * This module implement the cache API for Cortex-A/R AArch32 cores using CMSIS.
12 * Only L1-cache maintenance operations is supported.
16 #include <zephyr/cache.h>
20 /* Cache Type Register */
29 * @brief Get the smallest D-cache line size.
31 * Get the smallest D-cache line size of all the data and unified caches that
96 int arch_dcache_flush_range(void *start_addr, size_t size) in arch_dcache_flush_range() argument
100 uintptr_t end_addr = addr + size; in arch_dcache_flush_range()
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| /Zephyr-latest/dts/bindings/fs/ |
| D | zephyr,fstab,littlefs.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 Description of pre-defined file systems.
9 include: "zephyr,fstab-common.yaml"
12 # num-files and num-dirs are not filesystem-specific.
14 read-size:
18 The size of file system read operations, in bytes.
25 prog-size:
29 The size of file system program (write) operations, in bytes.
36 cache-size:
40 The size of block caches, in bytes.
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| /Zephyr-latest/arch/x86/core/ |
| D | cache.c | 2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
5 * SPDX-License-Identifier: Apache-2.0
9 * @brief Cache manipulation
18 #include <zephyr/cache.h>
21 /* Not Write-through bit */
23 /* Cache Disable bit */
35 /* Enable write-back caching by clearing the NW and CD bits */ in arch_dcache_enable()
47 /* Enter the no-fill mode by setting NW=0 and CD=1 */ in arch_dcache_disable()
82 * No alignment is required for either <virt> or <size>, but since
83 * sys_cache_flush() iterates on the cache lines, a cache line alignment for
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| /Zephyr-latest/lib/os/ |
| D | Kconfig | 2 # SPDX-License-Identifier: Apache-2.0
49 prompt "Cache handling"
55 bool "Use cache flag"
57 Use instance specific configuration flag for cache handling.
60 bool "Always handle cache"
62 Handle cache writeback and invalidation for all instances. Option used
68 bool "Never handle cache"
70 Discar cache handling for all instances. Option used to avoid runtime
84 int "Remote cache line size"
88 this value should be set to the data cache line size of the remote core.
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| /Zephyr-latest/drivers/disk/ |
| D | flashdisk.c | 3 * Copyright (c) 2022-2024 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
32 uint8_t *const cache; member
34 const size_t size; member
44 (block_size - (start & (block_size - 1)))
47 * The default block size is used for devices not requiring erase.
48 * It defaults to 512 as this is most widely used sector size
58 return ctx->erase_required; in flashdisk_with_erase()
69 ctx->erase_required = in flashdisk_probe_erase()
70 flash_params_get_erase_cap(flash_get_parameters(ctx->info.dev)) & in flashdisk_probe_erase()
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| /Zephyr-latest/dts/riscv/andes/ |
| D | andes_v5_ae350.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 compatible = "andestech,andescore-v5", "riscv";
24 mmu-type = "riscv,sv32";
25 clock-frequency = <60000000>;
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| /Zephyr-latest/dts/bindings/ipc/ |
| D | zephyr,ipc-icmsg.yaml | 4 # SPDX-License-Identifier: Apache-2.0
9 compatible: "zephyr,ipc-icmsg"
14 tx-region:
19 rx-region:
24 dcache-alignment:
27 Data cache alignment. If any side of the communication uses cache on
28 rx-region/tx-region this property must be the biggest value of the
29 invalidation or the write-back size for both sides of the communication.
30 If no side of the communication uses data cache this property could be
33 Side A: no data cache
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| /Zephyr-latest/.github/workflows/ |
| D | twister-prep.yaml | 9 size:
10 description: size
11 …value: ${{ jobs.prep_push.outputs.size != '' && jobs.prep_push.outputs.size || jobs.prep_pr.output…
14 …s.prep_push.outputs.fullrun != '' && jobs.prep_push.outputs.fullrun || jobs.prep_pr.outputs.size }}
18 … if: github.repository_owner == 'zephyrproject-rtos' && github.event_name == 'pull_request_target'
19 runs-on:
20 group: zephyr-runner-v2-linux-x64-4xlarge
22 image: ghcr.io/zephyrproject-rtos/ci-repo-cache:v0.27.4.20241026
23 options: '--entrypoint /bin/bash'
25 subset: ${{ steps.output-services.outputs.subset }}
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