1# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_SERIES_ESP32S3
5	select XTENSA
6	select DYNAMIC_INTERRUPTS
7	select ARCH_SUPPORTS_COREDUMP
8	select CLOCK_CONTROL
9	select PINCTRL
10	select HAS_ESPRESSIF_HAL
11	select CPU_HAS_FPU
12	select HAS_PM
13	select HAS_POWEROFF
14
15if SOC_SERIES_ESP32S3
16
17menu "Cache config"
18
19choice ESP32S3_INSTRUCTION_CACHE_SIZE
20	prompt "Instruction cache size"
21	default ESP32S3_INSTRUCTION_CACHE_16KB
22	help
23	  Instruction cache size to be set on application startup.
24	  If you use 16KB instruction cache rather than 32KB instruction cache,
25	  then the other 16KB will be managed by heap allocator.
26
27	config ESP32S3_INSTRUCTION_CACHE_16KB
28		bool "16KB"
29	config ESP32S3_INSTRUCTION_CACHE_32KB
30		bool "32KB"
31endchoice
32
33config ESP32S3_INSTRUCTION_CACHE_SIZE
34	hex
35	default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
36	default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
37
38choice ESP32S3_ICACHE_ASSOCIATED_WAYS
39	prompt "Instruction cache associated ways"
40	default ESP32S3_INSTRUCTION_CACHE_8WAYS
41	help
42	  Instruction cache associated ways to be set on application startup.
43
44	config ESP32S3_INSTRUCTION_CACHE_4WAYS
45		bool "4 ways"
46	config ESP32S3_INSTRUCTION_CACHE_8WAYS
47		bool "8 ways"
48endchoice
49
50config ESP32S3_ICACHE_ASSOCIATED_WAYS
51	int
52	default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
53	default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
54
55choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
56	prompt "Instruction cache line size"
57	default ESP32S3_INSTRUCTION_CACHE_LINE_32B
58	help
59	  Instruction cache line size to be set on application startup.
60
61	config ESP32S3_INSTRUCTION_CACHE_LINE_16B
62		bool "16 Bytes"
63		depends on ESP32S3_INSTRUCTION_CACHE_16KB
64	config ESP32S3_INSTRUCTION_CACHE_LINE_32B
65		bool "32 Bytes"
66endchoice
67
68config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
69	int
70	default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
71	default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
72
73config ESP32S3_INSTRUCTION_CACHE_WRAP
74	bool "Define instruction cache wrap mode"
75	help
76	  If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
77	  The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
78	  However, it depends on complex conditions.
79
80choice ESP32S3_DATA_CACHE_SIZE
81	prompt "Data cache size"
82	default ESP32S3_DATA_CACHE_32KB
83	help
84	  Data cache size to be set on application startup.
85	  If you use 32KB data cache rather than 64KB data cache,
86	  the other 32KB will be added to the heap.
87
88	config ESP32S3_DATA_CACHE_16KB
89		bool "16KB"
90	config ESP32S3_DATA_CACHE_32KB
91		bool "32KB"
92	config ESP32S3_DATA_CACHE_64KB
93		bool "64KB"
94endchoice
95
96config ESP32S3_DATA_CACHE_SIZE
97	hex
98	# For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup
99	default 0x8000 if ESP32S3_DATA_CACHE_16KB
100	default 0x8000 if ESP32S3_DATA_CACHE_32KB
101	default 0x10000 if ESP32S3_DATA_CACHE_64KB
102
103choice ESP32S3_DCACHE_ASSOCIATED_WAYS
104	prompt "Data cache associated ways"
105	default ESP32S3_DATA_CACHE_8WAYS
106	help
107	  Data cache associated ways to be set on application startup.
108
109	config ESP32S3_DATA_CACHE_4WAYS
110		bool "4 ways"
111	config ESP32S3_DATA_CACHE_8WAYS
112		bool "8 ways"
113endchoice
114
115config ESP32S3_DCACHE_ASSOCIATED_WAYS
116	int
117	default 4 if ESP32S3_DATA_CACHE_4WAYS
118	default 8 if ESP32S3_DATA_CACHE_8WAYS
119
120choice ESP32S3_DATA_CACHE_LINE_SIZE
121	prompt "Data cache line size"
122	default ESP32S3_DATA_CACHE_LINE_32B
123	help
124	  Data cache line size to be set on application startup.
125
126	config ESP32S3_DATA_CACHE_LINE_16B
127		bool "16 Bytes"
128		depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
129	config ESP32S3_DATA_CACHE_LINE_32B
130		bool "32 Bytes"
131	config ESP32S3_DATA_CACHE_LINE_64B
132		bool "64 Bytes"
133endchoice
134
135config ESP32S3_DATA_CACHE_LINE_SIZE
136	int
137	default 16 if ESP32S3_DATA_CACHE_LINE_16B
138	default 32 if ESP32S3_DATA_CACHE_LINE_32B
139	default 64 if ESP32S3_DATA_CACHE_LINE_64B
140
141config ESP32S3_DATA_CACHE_WRAP
142	bool "Define data cache wrap mode"
143	help
144	  If enabled, data cache will use wrap mode to read spi flash or spi ram.
145	  The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
146	  However, it depends on complex conditions.
147
148config MAC_BB_PD
149	bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled"
150	depends on SOC_SERIES_ESP32S3 && TICKLESS_KERNEL
151	default n
152	help
153	  If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered
154	  down when PHY is disabled. Enabling this setting reduces power consumption
155	  by a small amount but increases RAM use by approximat
156
157endmenu  # Cache config
158
159endif # SOC_SERIES_ESP32S3
160