Searched +full:board +full:- +full:pinctrl (Results 1 – 25 of 502) sorted by relevance
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | ite,it8xxx2-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined pins and functions for the SoC used by the board */ 25 #include <dt-bindings/pinctrl/it8xxx2-pinctrl.h> 27 &pinctrl { 31 gpio-voltage = "1p8"; [all …]
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D | renesas,ra-pincrl-pfs.yaml | 2 # SPDX-License-Identifier: Apache-2.0 9 The node has the 'pinctrl' node label set in your SoC's devicetree, 12 &pinctrl { 17 'pinctrl' node, as shown in this example: 19 /* You can put this in places like a board-pinctrl.dtsi file in 20 * your board directory, or a devicetree overlay in your application. 23 /* include pre-defined combinations for the SoC variant used by the board */ 24 #include <dt-bindings/pinctrl/renesas/pinctrl-ra.h> 26 &pinctrl { 32 drive-strength = "medium"; [all …]
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D | renesas,smartbond-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 9 The node has the 'pinctrl' node label set in your SoC's devicetree, 12 &pinctrl { 17 'pinctrl' node, as shown in this example: 19 /* You can put this in places like a board-pinctrl.dtsi file in 20 * your board directory, or a devicetree overlay in your application. 23 /* include definitions and utility macros for the SoC used by the board */ 24 #include <dt-bindings/pinctrl/smartbond-pinctrl.h> 26 &pinctrl { 36 /* route UART RX to P0.8 and enable pull-up */ [all …]
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D | telink,b91-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route UART0 TX to pin PB2 and enable the pull-up resistor 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined pins and functions for the SoC used by the board */ 25 #include <dt-bindings/pinctrl/b91-pinctrl.h> 27 &pinctrl { [all …]
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D | atmel,sam-pinctrl.yaml | 3 # Copyright (c) 2021-2022, Gerson Fernando Budke <nandojve@gmail.com> 4 # SPDX-License-Identifier: Apache-2.0 7 Atmel SAM Pinctrl container node 11 to route USART0 RX to pin PA10 and enable the pull-up resistor on the pin. 13 The node has the 'pinctrl' node label set in your SoC's devicetree, so you can 16 &pinctrl { 20 All device pin configurations should be placed in child nodes of the 'pinctrl' 23 /** You can put this in places like a <board>-pinctrl.dtsi file in 24 * your board directory, or a devicetree overlay in your application. 27 /** include pre-defined combinations for the SoC variant used by the board */ [all …]
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D | ti,cc32xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route UART0 RX to pin 55 and enable the pull-up resistor 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h> 27 &pinctrl { [all …]
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D | silabs,gecko-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 node to route UART0 RX to pin P0.1 and enable the pull-up resistor on the 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 23 &pinctrl { 41 state. You would specify the low-power configuration for the same device 48 include/dt-bindings/pinctrl/gecko-pinctrl.h header file. [all …]
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D | atmel,sam0-pinctrl.yaml | 2 # Copyright (c) 2021-2022, Gerson Fernando Budke 3 # SPDX-License-Identifier: Apache-2.0 6 Atmel SAM0 Pinctrl container node 10 to route SERCOM0 as UART were RX to pin PAD1 and enable the pull-up resistor 13 The node has the 'pinctrl' node label set in your SoC's devicetree, so you can 16 &pinctrl { 20 All device pin configurations should be placed in child nodes of the 'pinctrl' 23 /** You can put this in places like a <board>-pinctrl.dtsi file in 24 * your board directory, or a devicetree overlay in your application. 27 /** include pre-defined combinations for the SoC variant used by the board */ [all …]
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D | gd,gd32-pinctrl-af.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h> 27 &pinctrl { [all …]
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D | renesas,rcar-pfc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Renesas R-Car Pin Function Controller node 6 This binding gives a base representation of the R-Car pins configuration. 7 The R-Car pin controller is a singleton node responsible for controlling 9 node to route CAN0 TX A to pin 'RD', and enable pull-up resistor as well 21 /* You can put this in places like a board-pinctrl.dtsi file in 22 * your board directory, or a devicetree overlay in your application. 25 /* include pre-defined pins and functions for the SoC used by the board */ 26 #include <dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h> 43 (that is, active) state. You would specify the low-power configuration for [all …]
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D | raspberrypi,pico-pinctrl.yaml | 3 # SPDX-License-Identifier: Apache-2.0 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h> 27 &pinctrl { 40 input-enable; [all …]
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D | infineon,cat1-pinctrl.yaml | 4 # SPDX-License-Identifier: Apache-2.0 7 Infineon CAT1 Pinctrl container node 11 UART0 RX to a particular port/pin and enable the pull-up resistor on that 14 The node has the 'pinctrl' node label set in SoC's devicetree, 17 &pinctrl { 22 'bias-pull-up' property. Here is a list of the supported standard pin 24 * bias-high-impedance 25 * bias-pull-up 26 * bias-pull-down 27 * drive-open-drain [all …]
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D | nuvoton,npcx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 10 - bias-pull-down: Enable pull-down resistor. 11 - bias-pull-up: Enable pull-up resistor. 12 - drive-open-drain: Output driver is open-drain. 15 - pinmux-locked: Lock pinmux configuration for peripheral device 16 - pinmux-gpio: Inverse pinmux back to gpio 17 - psl-in-mode: Select the assertion detection mode of PSL input 18 - psl-in-pol: Select the assertion detection polarity of PSL input 20 An example for NPCX7 family, include the chip level pinctrl DTSI file in the 21 board level DTS: [all …]
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D | renesas,rzt2m-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 9 The node has the 'pinctrl' node label set in your SoC's devicetree, 12 &pinctrl { 17 'pinctrl' node, as shown in this example: 19 /* You can put this in places like a board-pinctrl.dtsi file in 20 * your board directory, or a devicetree overlay in your application. 23 /* include pre-defined combinations for the SoC variant used by the board */ 24 #include <dt-bindings/pinctrl/renesas-rzt2m-pinctrl.h> 26 &pinctrl { 33 input-enable; [all …]
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D | gd,gd32-pinctrl-afio.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/gd32f403z(k-i-g-e-c-b)xx-pinctrl.h> 27 &pinctrl { [all …]
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D | espressif,esp32-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 states are composed by groups of pre-defined pin muxing definitions and user 10 Each Zephyr-based application has its own set of pin muxing/pin configuration 11 requirements. The next steps use ESP-WROVER-KIT's I2C_0 to illustrate how one 12 could change a node's pin state properties. Though based on a particular board, 13 the same steps can be tweaked to address specifics of any other target board. 15 Suppose an application running on top of the ESP-WROVER-KIT board, for some 17 that board's original device tree source file (i.e., 'esp_wrover_kit.dts'), 18 you'll notice that the I2C_0 node is already assigned to a pre-defined state. 22 #include "esp_wrover_kit-pinctrl.dtsi" [all …]
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D | nordic,nrf-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 node to route UART0 RX to pin P0.1 and enable the pull-up resistor on the 10 The node has the 'pinctrl' node label set in your SoC's devicetree, 13 &pinctrl { 18 'pinctrl' node, as shown in this example: 20 /* You can put this in places like a board-pinctrl.dtsi file in 21 * your board directory, or a devicetree overlay in your application. 23 &pinctrl { 35 /* both P0.3 and P0.4 are configured with pull-up */ 36 bias-pull-up; [all …]
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D | ti,cc13xx-cc26xx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 TI SimpleLink CC13xx / CC26xx pinctrl node. 11 The node has the 'pinctrl' node label set in your SoC's devicetree, 14 &pinctrl { 19 'pinctrl' node, as in the i2c0 example shown at the end. 24 - bias-disable: Disable pull-up/down. 25 - bias-pull-down: Enable pull-down resistor. 26 - bias-pull-up: Enable pull-up resistor. 27 - drive-open-drain: Output driver is open-drain. 28 - drive-open-drain: Output driver is open-source. [all …]
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/Zephyr-latest/dts/bindings/pwm/ |
D | ti,cc13xx-cc26xx-timer-pwm.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 To configure a PWM node, you first need to define a board overlay with a 8 pinctrl configuration for the pin on which the PWM signal should be present: 10 &pinctrl { 13 bias-disable; 14 drive-strength = <8>; /* in mA, can be 2, 4 or 8 */ 20 - GPT0: IOC_PORT_MCU_PORT_EVENT1 21 - GPT1: IOC_PORT_MCU_PORT_EVENT3 22 - GPT2: IOC_PORT_MCU_PORT_EVENT5 23 - GPT3: IOC_PORT_MCU_PORT_EVENT7 [all …]
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D | espressif,esp32-ledc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 11 The mapping between the channel and GPIO is done through pinctrl 14 pinctrl-0 = <&ledc0_default>; 15 pinctrl-names = "default"; 18 The 'ledc0_default' node state is defined in <board>-pinctrl.dtsi. 25 output-enable; 29 If another GPIO mapping is desired, check if <board>-pinctrl.dtsi already have it defined, 31 <board>.overlay file. 33 https://github.com/zephyrproject-rtos/hal_espressif/tree/zephyr/include/dt-bindings/pinctrl 39 &pinctrl { [all …]
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/Zephyr-latest/scripts/utils/ |
D | pinctrl_nrf_migrate.py | 4 # SPDX-License-Identifier: Apache-2.0 7 Pinctrl Migration Utility Script for nRF Boards 11 nRF-based boards using the old <signal>-pin properties to select peripheral 12 pins. The script will parse a board Devicetree file and will first adjust that 13 file by removing old pin-related properties replacing them with pinctrl states. 14 A board-pinctrl.dtsi file will be generated containing the configuration for 15 all pinctrl states. Note that script will also work on files that have been 28 -i path/to/board.dts 29 [--no-backup] 30 [--skip-nrf-check] [all …]
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/Zephyr-latest/boards/nuvoton/npcx4m8f_evb/ |
D | npcx4m8f_evb.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 10 #include <nuvoton/npcx/npcx-espi-vws-ex-map.dtsi> 11 #include "npcx4m8f_evb-pinctrl.dtsi" 14 model = "Nuvoton NPCX4M8F evaluation board"; 20 zephyr,keyboard-scan = &kscan_input; 24 pwm-led0 = &pwm_led0_green; 26 pwm-0 = &pwm6; 27 i2c-0 = &i2c0_0; 29 peci-0 = &peci0; [all …]
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/Zephyr-latest/boards/st/stm32mp157c_dk2/ |
D | stm32mp157c_dk2.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/mp1/stm32mp157cacx-pinctrl.dtsi> 11 #include <zephyr/dt-bindings/input/input-event-codes.h> 14 model = "STMicroelectronics STM32MP157-DK2 board"; 15 compatible = "st,stm32mp157c-dk2"; 22 * board documentation. 24 * zephyr,shell-uart = &usart3; 31 compatible = "gpio-leds"; 39 compatible = "gpio-keys"; [all …]
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/Zephyr-latest/boards/ti/common/ |
D | launchxl_sky13317.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 * The CC1352P LAUNCHXL has an on-board antenna switch (SKY13317-373LF) used to select the 10 * appropriate RF signal port based on the currently-used PHY. 17 * Sub-1 GHz 0 0 1 // DIO30 mux to IOC_PORT_RFC_GPO0 for auto 26 pinctrl-0 = <&board_ant_24g_off &board_ant_tx_pa_off &board_ant_subg_off>; 27 pinctrl-1 = <&board_ant_24g_on &board_ant_tx_pa_off &board_ant_subg_off>; 28 pinctrl-2 = <&board_ant_24g_on &board_ant_tx_pa_on &board_ant_subg_off>; 29 pinctrl-3 = <&board_ant_24g_off &board_ant_tx_pa_off &board_ant_subg_on>; 30 pinctrl-4 = <&board_ant_24g_off &board_ant_tx_pa_on &board_ant_subg_on>; 31 pinctrl-names = "default", "ant_24g", "ant_24g_pa", "ant_subg", "ant_subg_pa"; [all …]
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/Zephyr-latest/boards/96boards/avenger96/ |
D | 96b_avenger96.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/mp1/stm32mp157aacx-pinctrl.dtsi> 12 model = "Arrow Electronics STM32MP157A Avenger96 board"; 13 compatible = "arrow,stm32mp157a-avenger96"; 21 * Zephyr board documentation. 23 * zephyr,shell-uart = &uart7; 30 compatible = "gpio-leds"; 53 clock-frequency = <DT_FREQ_M(209)>; 61 pinctrl-0 = <&uart4_tx_pd1 &uart4_rx_pb2>; [all …]
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