| /hal_espressif-latest/components/hal/include/hal/ |
| D | adc_types.h | 16 * @brief ADC unit
19 ADC_UNIT_1, ///< SAR ADC 1
20 ADC_UNIT_2, ///< SAR ADC 2
24 * @brief ADC channels
27 ADC_CHANNEL_0, ///< ADC channel
28 ADC_CHANNEL_1, ///< ADC channel
29 ADC_CHANNEL_2, ///< ADC channel
30 ADC_CHANNEL_3, ///< ADC channel
31 ADC_CHANNEL_4, ///< ADC channel
32 ADC_CHANNEL_5, ///< ADC channel
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| D | adc_oneshot_hal.h | 21 adc_unit_t unit; ///< ADC unit
22 adc_hal_work_mode_t work_mode; ///< ADC work mode
28 * ADC channel configuration
31 adc_atten_t atten; ///< ADC attenuation
32 adc_bitwidth_t bitwidth; ///< ADC conversion result bits
36 * Context of the ADC unit, should be maintained by both the driver and the HAL.
40 adc_oneshot_soc_handle_t dev; ///< ADC SoC layer handle
41 adc_unit_t unit; ///< ADC unit
42 adc_hal_work_mode_t work_mode; ///< ADC work mode
43 …adc_oneshot_hal_chan_cfg_t chan_configs[SOC_ADC_MAX_CHANNEL_NUM]; ///< ADC configurations per c…
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| D | adc_hal_common.h | 19 * used by both ADC RTC controller and Digital controller
23 * ADC work mode
33 * Set ADC work mode
35 * @param unit ADC unit
57 ADC calibration setting
64 * @param adc_n ADC index numer
69 * Set the calibration result (initial data) to ADC.
71 …* @note Different ADC units and different attenuation options use different calibration data (ini…
73 * @param adc_n ADC index number.
79 * Calibrate the ADC using internal connections.
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| /hal_espressif-latest/components/esp_adc/include/esp_adc/ |
| D | adc_oneshot.h | 21 * @brief Type of ADC unit handle for oneshot mode
26 * @brief ADC oneshot driver initial configurations
29 adc_unit_t unit_id; ///< ADC unit
31 adc_ulp_mode_t ulp_mode; ///< ADC controlled by ULP, see `adc_ulp_mode_t`
35 * @brief ADC channel configurations
38 adc_atten_t atten; ///< ADC attenuation
39 adc_bitwidth_t bitwidth; ///< ADC conversion result bits
43 * @brief Create a handle to a specific ADC unit
45 * @note This API is thread-safe. For more details, see ADC programming guide
48 * @param[out] ret_unit ADC unit handle
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| D | adc_continuous.h | 29 * ADC continuous mode conversion is made up with multiple Conversion Frames.
34 …* structure is `adc_digi_output_data_t`, including ADC Unit, ADC Channel …
42 …* @brief ADC read max timeout value, it may make the ``adc_continuous_read`` block forever if the …
47 * @brief Type of adc continuous mode driver handle
52 * @brief ADC continuous mode driver initial configurations
60 * @brief ADC continuous mode driver configurations
63 uint32_t pattern_num; ///< Number of ADC channels that will be used
64 …adc_digi_pattern_config_t *adc_pattern; ///< List of configs for each ADC channel that will be used
65 …uint32_t sample_freq_hz; /*!< The expected ADC sampling frequency in Hz. Please ref…
66 …adc_digi_convert_mode_t conv_mode; ///< ADC DMA conversion mode, see `adc_digi_convert_mode_t…
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| D | adc_cali_scheme.h | 24 adc_unit_t unit_id; ///< ADC unit
25 …adc_channel_t chan; ///< ADC channel, for chips with SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED,…
26 adc_atten_t atten; ///< ADC attenuation
27 adc_bitwidth_t bitwidth; ///< ADC raw output bitwidth
34 * ADC calibration via the handle you get.
37 * @param[out] handle ADC calibration handle
50 * @param[in] handle ADC calibration handle
74 adc_unit_t unit_id; ///< ADC unit
75 adc_atten_t atten; ///< ADC attenuation
76 adc_bitwidth_t bitwidth; ///< ADC raw output bitwidth
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| D | adc_filter.h | 21 * @brief Type of adc iir filter handle
29 adc_unit_t unit; ///< ADC unit
30 … ///< An ADC channel to be filtered. Note for ESP32S2, you should only set only one c…
31 adc_digi_iir_filter_coeff_t coeff; ///< ADC filter coefficient
36 * @brief New an ADC continuous mode IIR filter
38 * @param[in] handle ADC continuous mode driver handle
53 * @param[in] filter_hdl ADC IIR filter handle
65 * @param[in] filter_hdl ADC IIR filter handle
77 * @param[in] filter_hdl ADC IIR filter handle
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| D | adc_cali.h | 18 * @brief ADC calibration handle
23 * @brief ADC calibration scheme
31 * @brief Check the supported ADC calibration scheme
33 * @param[out] scheme_mask Supported ADC calibration scheme(s)
43 * @brief Convert ADC raw data to calibrated voltage
45 * @param[in] handle ADC calibration handle
46 * @param[in] raw ADC raw data
47 * @param[out] voltage Calibrated ADC voltage (in mV)
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| /hal_espressif-latest/zephyr/port/include/ |
| D | esp_adc_cal.h | 12 #include "driver/adc.h"
31 * @brief Structure storing characteristics of an ADC
36 adc_unit_t adc_num; /**< ADC number*/
37 adc_atten_t atten; /**< ADC attenuation*/
38 adc_bits_width_t bit_width; /**< ADC bit width */
39 uint32_t coeff_a; /**< Gradient of ADC-Voltage curve*/
40 uint32_t coeff_b; /**< Offset of ADC-Voltage curve*/
44 uint8_t version; /**< ADC Calibration */
48 * @brief Checks if ADC calibration values are burned into eFuse
50 * This function checks if ADC reference voltage or Two Point values have been
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| /hal_espressif-latest/components/hal/esp32s2/include/hal/ |
| D | adc_ll.h | 62 ADC_LL_POWER_BY_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */
63 ADC_LL_POWER_SW_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
64 ADC_LL_POWER_SW_OFF, /*!< ADC XPD controlled by SW. power off. */
82 * @brief ADC digital controller (DMA mode) work mode.
116 uint16_t data: 13; /*!<ADC real output data info. Resolution: 13 bit. */
118 uint16_t flag: 2; /*!<ADC data flag info.
131 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
133 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
148 * Set adc sample cycle.
151 * @param sample_cycle The number of ADC sampling cycles. Range: 1 ~ 7.
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| /hal_espressif-latest/components/hal/esp32c2/include/hal/ |
| D | adc_ll.h | 58 ADC_LL_POWER_BY_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */
59 ADC_LL_POWER_SW_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
60 ADC_LL_POWER_SW_OFF, /*!< ADC XPD controlled by SW. power off. */
72 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
74 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
89 * Set adc sample cycle for digital controller.
92 …* @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive …
103 * Set SAR ADC module clock division factor.
104 * SAR ADC clock divided from digital controller clock.
110 /* ADC clock divided from digital controller clock clk */ in adc_ll_digi_set_clk_div()
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| /hal_espressif-latest/components/hal/esp32h2/include/hal/ |
| D | adc_ll.h | 66 …ADC_LL_POWER_BY_FSM = SAR_CTRL_LL_POWER_FSM, /*!< ADC XPD controlled by FSM. Used for polling mo…
67 …ADC_LL_POWER_SW_ON = SAR_CTRL_LL_POWER_ON, /*!< ADC XPD controlled by SW. power on. Used for DM…
68 ADC_LL_POWER_SW_OFF = SAR_CTRL_LL_POWER_OFF, /*!< ADC XPD controlled by SW. power off. */
72 ADC_LL_CTRL_DIG = 0, ///< ADC digital controller
76 * @brief ADC digital controller (DMA mode) work mode.
103 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
105 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
120 * Set adc sample cycle for digital controller.
123 …* @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive …
133 * Set SAR ADC module clock division factor.
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| /hal_espressif-latest/components/hal/esp32c6/include/hal/ |
| D | adc_ll.h | 66 …ADC_LL_POWER_BY_FSM = SAR_CTRL_LL_POWER_FSM, /*!< ADC XPD controlled by FSM. Used for polling mo…
67 …ADC_LL_POWER_SW_ON = SAR_CTRL_LL_POWER_ON, /*!< ADC XPD controlled by SW. power on. Used for DM…
68 ADC_LL_POWER_SW_OFF = SAR_CTRL_LL_POWER_OFF, /*!< ADC XPD controlled by SW. power off. */
72 ADC_LL_CTRL_DIG = 0, ///< ADC digital controller
76 * @brief ADC digital controller (DMA mode) work mode.
103 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
105 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
120 * Set adc sample cycle for digital controller.
123 …* @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive …
133 * Set SAR ADC module clock division factor.
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| /hal_espressif-latest/components/hal/esp32s3/include/hal/ |
| D | adc_ll.h | 62 ADC_LL_POWER_BY_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */
63 ADC_LL_POWER_SW_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
64 ADC_LL_POWER_SW_OFF, /*!< ADC XPD controlled by SW. power off. */
82 * @brief ADC digital controller (DMA mode) work mode.
120 uint16_t data: 13; /*!<ADC real output data info. Resolution: 13 bit. */
122 uint16_t flag: 2; /*!<ADC data flag info.
140 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
142 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
157 * Set adc sample cycle for digital controller.
160 …* @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive …
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| /hal_espressif-latest/components/hal/esp32c3/include/hal/ |
| D | adc_ll.h | 60 …* Workaround: on ESP32C3, the internal hardware counter that counts ADC samples will not be automa…
62 …* Therefore, traverse from 0 to the value configured last time, so as to clear the ADC sample coun…
72 ADC_LL_POWER_BY_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */
73 ADC_LL_POWER_SW_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */
74 ADC_LL_POWER_SW_OFF, /*!< ADC XPD controlled by SW. power off. */
83 * @brief ADC digital controller (DMA mode) work mode.
110 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
112 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
127 * Set adc sample cycle for digital controller.
130 …* @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive …
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| /hal_espressif-latest/components/hal/esp32/include/hal/ |
| D | adc_ll.h | 45 //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_L…
62 * @brief ADC digital controller (DMA mode) work mode.
82 uint8_t bit_width: 2; //ADC resolution. 0: 9 bit; 1: 10 bit; 2: 11 bit; 3: 12 bit
99 * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
101 * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
116 * Set adc sample cycle.
119 * @param sample_cycle The number of ADC sampling cycles. Range: 1 ~ 7.
127 * ADC module clock division factor setting. ADC clock divided from APB clock.
133 /* ADC clock divided from APB clk, e.g. 80 / 2 = 40Mhz, */ in adc_ll_digi_set_clk_div()
138 * Set adc max conversion number for digital controller.
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| /hal_espressif-latest/components/esp_adc/deprecated/include/ |
| D | esp_adc_cal.h | 17 #warning "legacy adc calibration driver is deprecated, please migrate to use esp_adc/adc_cali.h and…
26 * @brief Checks if ADC calibration values are burned into eFuse
28 * This function checks if ADC reference voltage or Two Point values have been
43 * @brief Characterize an ADC at a particular attenuation
45 * This function will characterize the ADC at a particular attenuation and generate
46 * the ADC-Voltage curve in the form of [y = coeff_a * x + coeff_b].
55 * @param[in] adc_num ADC to characterize (ADC_UNIT_1 or ADC_UNIT_2)
57 * @param[in] bit_width Bit width configuration of ADC
58 …* @param[in] default_vref Default ADC reference voltage in mV (Only in ESP32, used if eFuse v…
59 * @param[out] chars Pointer to empty structure used to store ADC characteristics
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| /hal_espressif-latest/components/esp_adc/include/esp_private/ |
| D | adc_private.h | 21 ADC IOs
24 * @brief Get ADC channel from the given GPIO number
27 * @param[out] unit_id ADC unit
28 * @param[out] channel ADC channel
33 * - ESP_ERR_NOT_FOUND: The IO is not a valid ADC pad
38 * @brief Get GPIO number from the given ADC channel
40 * @param[in] unit_id ADC unit
41 * @param[in] channel ADC channel
52 ADC Oneshot Read API ISR Version
56 * @brief ISR version to get one ADC conversion raw result
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| /hal_espressif-latest/components/esp_hw_support/include/esp_private/ |
| D | adc_share_hw_ctrl.h | 8 * ADC is shared by multiple components, including:
15 * - adc power maintainance
16 * - adc hw calibration settings
17 * - adc locks, to prevent concurrently using adc hw
31 ADC Hardware Calibration
34 …* @brief Calculate the ADC HW calibration code. (Based on the pre-stored efuse or actual calibrati…
36 * @param adc_n ADC unit to calibrate
42 * @brief Set the ADC HW calibration code.
44 * @param adc_n ADC unit to calibrate
51 * @brief Load the channel compensation of the ADC HW calibration from eFuse to a static array
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| /hal_espressif-latest/components/esp_adc/ |
| D | Kconfig | 1 menu "ADC and ADC Calibration"
4 bool "Place ISR version ADC oneshot mode read function into IRAM"
7 Place ISR version ADC oneshot mode read function into IRAM.
11 bool "ADC continuous mode driver ISR IRAM-Safe"
15 Ensure the ADC continuous mode ISR is IRAM-Safe. When enabled, the ISR handler
18 menu "ADC Calibration Configurations"
26 This option will allow the ADC calibration component to characterize the
27 ADC-Voltage curve using Two Point values if they are available.
34 the ADC calibration component to characterize the ADC-Voltage curve using
41 This option will allow the ADC calibration component to use Lookup Tables
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| D | adc_continuous_internal.h | 44 * @brief ADC iir filter context
49 adc_continuous_ctx_t *continuous_ctx; //ADC continuous driver context
53 * @brief ADC continuous driver context
61 spi_host_device_t spi_host; //ADC uses this SPI DMA
63 i2s_port_t i2s_host; //ADC uses this I2S DMA
70 …adc_fsm_t fsm; //ADC continuous mode driver internal …
71 …bool use_adc1; //1: ADC unit1 will be used; 0: ADC un…
72 …bool use_adc2; //1: ADC unit2 will be used; 0: ADC un…
73 … adc1_atten; //Attenuation for ADC1. On this chip each ADC can only support on…
74 … adc2_atten; //Attenuation for ADC2. On this chip each ADC can only support on…
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| /hal_espressif-latest/components/driver/deprecated/driver/ |
| D | adc_types_legacy.h | 15 * @brief ADC resolution setting option.
20 ADC_WIDTH_BIT_9 = 9, /*!< ADC capture width is 9Bit. */
21 ADC_WIDTH_BIT_10 = 10, /*!< ADC capture width is 10Bit. */
22 ADC_WIDTH_BIT_11 = 11, /*!< ADC capture width is 11Bit. */
23 ADC_WIDTH_BIT_12 = 12, /*!< ADC capture width is 12Bit. */
25 ADC_WIDTH_BIT_12 = 12, /*!< ADC capture width is 12Bit. */
27 ADC_WIDTH_BIT_13 = 13, /*!< ADC capture width is 13Bit. */
33 * The default (max) bit width of the ADC of current version. You can also get the maximum bitwidth
110 …* @brief Digital ADC DMA read max timeout value, it may make the ``adc_digi_read_bytes`` block for…
115 * @brief ADC DMA driver configuration
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| D | adc.h | 8 This file contains Deprecated ADC APIs
20 #warning "legacy adc driver is deprecated, please migrate to use esp_adc/adc_oneshot.h and esp_adc/…
32 ADC Single Read Setting
49 * The default ADC voltage is for attenuation 0 dB and listed in the table below.
52 * Due to ADC characteristics, most accurate results are obtained within the "suggested range"
76 …* For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended…
81 …* ADC channels simultaneously. You may call ``adc1_get_raw()`` only after configuring a chan…
131 * @brief Set ADC data invert
132 * @param adc_unit ADC unit index
141 * @brief Set ADC source clock
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| /hal_espressif-latest/components/bootloader_support/src/ |
| D | bootloader_random_esp32s3.c | 22 // but enabling the SAR ADC as well adds some insurance.) in bootloader_random_enable()
25 /// Enable SAR ADC to read a disconnected input for additional entropy in bootloader_random_enable()
27 // Reset ADC clock in bootloader_random_enable()
31 // Enable clock and select clock source for ADC digital controller in bootloader_random_enable()
37 …// Internal ADC sample freq = apb_clk / (APB_SARADC_CLKM_DIV_NUM + 1) / (APB_SARADC_SAR_CLK_DIV + … in bootloader_random_enable()
62 // Disable ADC filter in bootloader_random_enable()
66 // Start ADC sample in bootloader_random_enable()
86 //Power off SAR ADC in bootloader_random_disable()
88 //return to ADC RTC controller in bootloader_random_disable()
90 //Invalidate ADC digital trigger timer in bootloader_random_disable()
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| /hal_espressif-latest/zephyr/esp32s3/src/ |
| D | soc_random.c | 22 * but enabling the SAR ADC as well adds some insurance.) in soc_random_enable()
26 /* Enable SAR ADC to read a disconnected input for additional entropy */ in soc_random_enable()
28 /* Reset ADC clock */ in soc_random_enable()
32 /* Enable clock and select clock source for ADC digital controller */ in soc_random_enable()
39 * Internal ADC sample freq = apb_clk / (APB_SARADC_CLKM_DIV_NUM + 1) / in soc_random_enable()
71 /* Disable ADC filter */ in soc_random_enable()
75 /* Start ADC sample */ in soc_random_enable()
94 /* Power off SAR ADC */ in soc_random_disable()
96 /* return to ADC RTC controller */ in soc_random_disable()
98 /* Invalidate ADC digital trigger timer */ in soc_random_disable()
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