45 //On esp32, ADC can only be continuously triggered when `ADC_LL_DEFAULT_CONV_LIMIT_EN == 1`, `ADC_L…
62  * @brief ADC digital controller (DMA mode) work mode.
82             uint8_t bit_width:   2;  //ADC resolution. 0: 9 bit; 1: 10 bit; 2: 11 bit; 3: 12 bit
99  * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms.
101  * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor.
116  * Set adc sample cycle.
119  * @param sample_cycle The number of ADC sampling cycles. Range: 1 ~ 7.
127  * ADC module clock division factor setting. ADC clock divided from APB clock.
133     /* ADC clock divided from APB clk, e.g. 80 / 2 = 40Mhz, */  in adc_ll_digi_set_clk_div()
138  * Set adc max conversion number for digital controller.
139  * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
150  * If the number of ADC conversion is equal to the maximum, the conversion is stopped.
151  * @note On esp32, this should always be 1 to trigger the ADC continuously
161  * Set adc conversion mode for digital controller.
190  * ADC module Digital output data invert or not.
192  * @prarm adc_n ADC unit.
197         SYSCON.saradc_ctrl2.sar1_inv = inv_en;   // Enable / Disable ADC data invert  in adc_ll_digi_output_invert()
199         SYSCON.saradc_ctrl2.sar2_inv = inv_en;  // Enable / Disable ADC data invert  in adc_ll_digi_output_invert()
206  * @param src 1: I2S input data is from SAR ADC (for DMA)  0: I2S input data is from GPIO matrix
215 …* The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, i…
219  * @param adc_n ADC unit.
233 …* The pattern table that defines the conversion rules for each SAR ADC. Each table has 16 items, i…
237  * @param adc_n ADC unit.
283  * @param adc_n ADC unit.
297  * Disable clock for ADC digital controller.
309  * Set adc cct for PWDET controller.
321  * Get adc cct for PWDET controller.
336  * ADC SAR clock division factor setting. ADC SAR clock divided from `RTC_FAST_CLK`.
350  * Set adc output data format for RTC controller.
352  * @param adc_n ADC unit.
387  * Enable adc channel to start convert.
391  * @param adc_n ADC unit.
392  * @param channel ADC channel number for each ADCn.
404  * Disable adc channel to start convert.
408  * @param adc_n ADC unit.
424  * @param adc_n ADC unit.
441  * @param event ADC event
451  * @param event ADC event
473  * @param adc_n ADC unit.
489  * ADC module RTC output data invert or not.
491  * @param adc_n ADC unit.
496         SENS.sar_read_ctrl.sar1_data_inv = inv_en;   // Enable / Disable ADC data invert  in adc_oneshot_ll_output_invert()
498         SENS.sar_read_ctrl2.sar2_data_inv = inv_en;  // Enable / Disable ADC data invert  in adc_oneshot_ll_output_invert()
505  * @param adc_n ADC unit.
506  * @param raw   ADC raw data input (convert value).
531  * @param adc_n ADC unit.
557  * Disable oneshot conversion trigger for all the ADC units
568  * Set ADC module controller.
569  * There are five SAR ADC controllers:
574  * @param adc_n ADC unit.
575  * @param ctrl ADC controller.
584 …as_start1.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
585 …as_start1.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
591 …as_start1.meas1_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
592 …as_start1.sar1_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
598 …as_start1.meas1_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
599 …as_start1.sar1_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
609 …as_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
610 …as_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
616 …as_start2.meas2_start_force  = 0;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
617 …as_start2.sar2_en_pad_force  = 0;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
623 …as_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
624 …as_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
630 …as_start2.meas2_start_force  = 1;    // 1: SW control RTC ADC start;     0: ULP control RTC ADC st…  in adc_ll_set_controller()
631 …as_start2.sar2_en_pad_force  = 1;    // 1: SW control RTC ADC bit map;   0: ULP control RTC ADC bi…  in adc_ll_set_controller()
643  * Close ADC AMP module if don't use it for power save.
706  *  Output ADC internal reference voltage to channels, only available for ADC2 on ESP32.
712  *  @param[in]  adc ADC unit select
716 static inline void adc_ll_vref_output(adc_unit_t adc, adc_channel_t channel, bool en)  in adc_ll_vref_output()  argument
718     if (adc != ADC_UNIT_2) {  in adc_ll_vref_output()