| /hal_espressif-latest/components/efuse/esp32c6/ |
| D | esp_efuse_table.csv | 38 WR_DIS.SEC_DPA_LEVEL, EFUSE_BLK0, 14, 1, [WR_DIS.DPA_SEC_LEVEL] wr_di…
136 SEC_DPA_LEVEL, EFUSE_BLK0, 112, 2, [DPA_SEC_LEVEL] Represents t…
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| D | esp_efuse_table.c | 115 {EFUSE_BLK0, 14, 1}, // [WR_DIS.DPA_SEC_LEVEL] wr_dis of SEC_DPA_LEVEL,
506 static const esp_efuse_desc_t SEC_DPA_LEVEL[] = { variable
877 &WR_DIS_SEC_DPA_LEVEL[0], // [WR_DIS.DPA_SEC_LEVEL] wr_dis of SEC_DPA_LEVEL
1367 …&SEC_DPA_LEVEL[0], // [DPA_SEC_LEVEL] Represents the spa secure level by configuring the cloc…
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| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | hp_system_struct.h | 69 /** sec_dpa_level : R/W; bitpos: [1:0]; default: 0;
75 uint32_t sec_dpa_level:2; member
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| D | efuse_struct.h | 341 /** sec_dpa_level : RO; bitpos: [17:16]; default: 0;
344 uint32_t sec_dpa_level:2; member
1772 * Indicates a programming error of SEC_DPA_LEVEL.
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| D | efuse_reg.h | 2016 * Indicates a programming error of SEC_DPA_LEVEL.
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| /hal_espressif-latest/components/efuse/esp32h2/ |
| D | esp_efuse_table.csv | 38 WR_DIS.SEC_DPA_LEVEL, EFUSE_BLK0, 14, 1, [] wr_dis of SEC_DPA_LEVEL
138 SEC_DPA_LEVEL, EFUSE_BLK0, 112, 2, [] Represents the spa secure…
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| D | esp_efuse_table.c | 115 {EFUSE_BLK0, 14, 1}, // [] wr_dis of SEC_DPA_LEVEL,
514 static const esp_efuse_desc_t SEC_DPA_LEVEL[] = { variable
885 &WR_DIS_SEC_DPA_LEVEL[0], // [] wr_dis of SEC_DPA_LEVEL
1385 …&SEC_DPA_LEVEL[0], // [] Represents the spa secure level by configuring the clock random divi…
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| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | hp_system_struct.h | 69 /** sec_dpa_level : R/W; bitpos: [1:0]; default: 0;
75 uint32_t sec_dpa_level:2; member
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| D | efuse_struct.h | 341 /** sec_dpa_level : RO; bitpos: [17:16]; default: 0;
344 uint32_t sec_dpa_level:2; member
1775 * Indicates a programming error of SEC_DPA_LEVEL.
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| D | efuse_reg.h | 2028 * Indicates a programming error of SEC_DPA_LEVEL.
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| /hal_espressif-latest/tools/esptool_py/docs/en/espefuse/inc/ |
| D | summary_ESP32-C6.rst | 92 …SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring …
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| D | summary_ESP32-H2.rst | 91 …SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring …
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| D | summary_ESP32-P4.rst | 111 …SEC_DPA_LEVEL (BLOCK0) Represents the spa secure level by configuring …
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| /hal_espressif-latest/tools/esptool_py/espefuse/efuse_defs/ |
| D | esp32c61.yaml | 29 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 2, pos: 24, len : 2, start : 88, type…
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| D | esp32c5.yaml | 39 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type…
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| D | esp32c5beta3.yaml | 39 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type…
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| D | esp32c6.yaml | 36 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type…
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| D | esp32h2.yaml | 36 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type…
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| D | esp32p4.yaml | 38 …SEC_DPA_LEVEL : {show: y, blk : 0, word: 3, pos: 16, len : 2, start: 112, type…
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