Searched full:ram (Results 1 – 25 of 1716) sorted by relevance
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| /Zephyr-latest/snippets/ram-console/ |
| D | README.rst | 1 .. _snippet-ram-console:
3 RAM Console Snippet (ram-console)
8 west build -S ram-console [...]
13 This snippet redirects console output to a RAM buffer. The RAM console
14 buffer is a global array located in RAM region by default, whose address
15 is unknown before building. The RAM console driver also supports using
16 a dedicated section for the RAM console buffer with prefined address.
18 How to enable RAM console buffer section
21 Add board dts overlay to this snippet to add property ``zephyr,ram-console``
29 zephyr,ram-console = &snippet_ram_console;
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| /Zephyr-latest/soc/gaisler/leon3/ |
| D | linker.ld | 19 RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE)
24 REGION_ALIAS("REGION_TEXT", RAM);
25 REGION_ALIAS("REGION_RODATA", RAM);
26 REGION_ALIAS("REGION_DATA_VMA", RAM);
27 REGION_ALIAS("REGION_DATA_LMA", RAM);
28 REGION_ALIAS("REGION_BSS", RAM);
30 #define ROMABLE_REGION RAM
31 #define RAMABLE_REGION RAM
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| /Zephyr-latest/dts/bindings/memory-controllers/ |
| D | nxp,flexram.yaml | 4 description: NXP FlexRAM on-chip ram controller
22 on arbitrary address access in any on chip RAM region.
24 flexram,num-ram-banks:
28 Number of RAM banks in the SOC ram array
34 Size of each RAM bank in KB
39 Custom mapping of runtime RAM bank partitions. If this
47 TCM RAM read will finish in 2 cycles instead of 1.
52 TCM RAM write will finish in 2 cycles instead of 1.
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| /Zephyr-latest/soc/gaisler/gr716a/ |
| D | linker.ld | 18 * available on all systems. bootprom, RAM and SRAM are always available.
26 RAM (rw) : ORIGIN = 0x30000000, LENGTH = 64K
34 REGION_ALIAS("REGION_RODATA", RAM);
35 REGION_ALIAS("REGION_DATA_VMA", RAM);
36 REGION_ALIAS("REGION_DATA_LMA", RAM);
37 REGION_ALIAS("REGION_BSS", RAM);
39 #define ROMABLE_REGION RAM
40 #define RAMABLE_REGION RAM
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| /Zephyr-latest/samples/net/zperf/ |
| D | Kconfig | 7 bool "Relocate networking code into RAM"
10 Relocate networking code into RAM when running the zperf
12 RAM.
17 string "Networking code RAM location"
18 default "RAM"
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| /Zephyr-latest/tests/drivers/i2c/i2c_ram/ |
| D | testcase.yaml | 6 filter: dt_alias_exists("i2c-ram")
11 drivers.i2c.ram:
16 drivers.i2c.ram.rtio:
21 drivers.i2c.ram.pm:
27 drivers.i2c.ram.pm.rtio:
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| D | README.rst | 1 i2c ram test
4 Tests an i2c controller driver against a (s/f/nv)ram module doing a simple write and readback.
11 - External I2C RAM chipset connected to the I2C bus, e.g: Fujitsu's MB85 FeRAM.
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| /Zephyr-latest/include/zephyr/display/ |
| D | ssd16xx.h | 13 * SSD16xx RAM type for direct RAM access
16 /** The black RAM buffer. This is typically the buffer used to
21 /* The red RAM buffer. This is typically the old frame buffer
30 * RAM.
33 * @param ram_type Type of RAM to read from
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| /Zephyr-latest/soc/xlnx/zynq7000/xc7zxxx/ |
| D | Kconfig.soc | 21 28k logic cells, 2.1Mb block RAM, 800 DSP slices, up to 100 I/O pins.
28 74k logic cells, 3.3Mb block RAM, 160 DSP slices, up to 150 I/O pins,
36 85k logic cells, 4.9Mb block RAM, 220 DSP slices, up to 200 I/O pins.
43 125k logic cells, 9.3Mb block RAM, 400 DSP slices, up to 250 I/O pins,
51 275k logic cells, 17.6Mb block RAM, 900 DSP slices, up to 362 I/O pins,
59 350k logic cells, 19.1Mb block RAM, 900 DSP slices, up to 362 I/O pins,
67 444k logic cells, 26.5Mb block RAM, 2020 DSP slices, up to 400 I/O pins,
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| /Zephyr-latest/include/zephyr/arch/common/ |
| D | pm_s2ram.h | 44 * This function is used on suspend-to-RAM (S2RAM) to save the CPU context in
45 * (retained) RAM before powering the system off using the provided function.
61 * @brief Mark that core is entering suspend-to-RAM state.
63 * Function is called when system state is stored to RAM, just before going to system
66 * Default implementation is setting a magic word in RAM. CONFIG_PM_S2RAM_CUSTOM_MARKING
77 * @brief Check suspend-to-RAM marking and clear its state.
79 * Function is used to determine if resuming after suspend-to-RAM shall be performed
82 * Default implementation is checking a magic word in RAM. CONFIG_PM_S2RAM_CUSTOM_MARKING
90 * @retval true if marking is found which indicates resuming after suspend-to-RAM.
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| /Zephyr-latest/dts/bindings/disk/ |
| D | zephyr,ram-disk.yaml | 4 description: RAM disk
6 compatible: "zephyr,ram-disk"
30 ram-region:
33 Optional phandle to the memory region to be used as a RAM disk,
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| /Zephyr-latest/include/zephyr/arch/mips/ |
| D | linker.ld | 18 #define ROMABLE_REGION RAM
19 #define RAMABLE_REGION RAM
27 RAM (rwx) : ORIGIN = CONFIG_SRAM_BASE_ADDRESS, LENGTH = KB(CONFIG_SRAM_SIZE)
32 REGION_ALIAS("REGION_TEXT", RAM);
33 REGION_ALIAS("REGION_RODATA", RAM);
34 REGION_ALIAS("REGION_DATA_VMA", RAM);
35 REGION_ALIAS("REGION_DATA_LMA", RAM);
36 REGION_ALIAS("REGION_BSS", RAM);
137 #include <zephyr/linker/common-ram.ld>
142 #include <snippets-ram-sections.ld>
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| /Zephyr-latest/soc/nxp/lpc/lpc55xxx/ |
| D | Kconfig.defconfig | 29 # By default, CMSIS SystemInit will enable the clock to these RAM banks.
30 # Disable this Kconfig to leave the ram banks untouched out of reset.
34 # Some SoC's in the LPC5500 Series do have a dedicated USB RAM.
35 # By default, USB RAM is assumed to be present.
36 # Disable this Kconfig in case there is no dedicated USB RAM.
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| /Zephyr-latest/soc/espressif/common/ |
| D | Kconfig.spiram | 7 bool "Support for external, SPI-connected RAM"
12 This enables support for an external SPI RAM chip, connected in
15 menu "SPI RAM config"
34 bool "Run memory test on SPI RAM initialization"
40 prompt "Mode (QUAD/OCT) of SPI RAM chip in use"
53 prompt "Type of SPI RAM chip in use"
81 prompt "Set RAM clock speed"
84 Select the speed for the SPI RAM chip.
130 can forgo being placed in IRAM, thus optimizing RAM usage (see External RAM documentation
140 can forgo being placed in IRAM, thus optimizing RAM usage (see External RAM documentation
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| /Zephyr-latest/include/zephyr/drivers/flash/ |
| D | flash_simulator.h | 21 * @brief Obtain a pointer to the RAM buffer used but by the simulator
23 * This function allows the caller to get the address and size of the RAM buffer
27 * @param[out] mock_size size of the ram buffer.
29 * @retval pointer to the ram buffer
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| /Zephyr-latest/samples/boards/st/power_mgmt/suspend_to_ram/ |
| D | README.rst | 2 :name: Suspend to RAM
5 Use suspend to RAM low power mode on STM32.
13 SPI loopback is also available but not yet implemented for Suspend To RAM PM
16 .. _stm32-pm-suspend-to-ram-sample-requirements:
25 for LPTIM (which is disabled). The board shall also have RAM retention to be
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| /Zephyr-latest/tests/subsys/fs/fat_fs_dual_drive/ |
| D | app.overlay | 9 compatible = "zephyr,ram-disk";
10 disk-name = "RAM";
16 compatible = "zephyr,ram-disk";
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| /Zephyr-latest/include/zephyr/drivers/can/ |
| D | can_mcan.h | 59 /* RAM Watchdog register */
428 * @brief Get the Bosch M_CAN Message RAM offset
431 * @return the Message RAM offset in bytes
437 * @brief Get the number of standard (11-bit) filter elements in Bosch M_CAN Message RAM
446 * @brief Get the number of extended (29-bit) filter elements in Bosch M_CAN Message RAM
455 * @brief Get the number of Rx FIFO 0 elements in Bosch M_CAN Message RAM
464 * @brief Get the number of Rx FIFO 1 elements in Bosch M_CAN Message RAM
473 * @brief Get the number of Rx Buffer elements in Bosch M_CAN Message RAM
482 * @brief Get the number of Tx Event FIFO elements in Bosch M_CAN Message RAM
491 * @brief Get the number of Tx Buffer elements in Bosch M_CAN Message RAM
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| /Zephyr-latest/include/zephyr/arch/x86/ |
| D | memory.ld | 12 * are in RAM.
17 * in RAM and are copied from flash at boot. Text/rodata linked in-place in
34 /* Bounds of physical RAM from DTS */
39 * the same as its physical location, although an identity mapping for RAM
51 /* "kernel RAM" for linker VMA allocations starts at the offset */
67 /* Physical RAM location where the kernel image is loaded */
87 * or copied into physical RAM by a loader (MMU)
97 RAM (wx) : ORIGIN = KERNEL_BASE_ADDR, LENGTH = KERNEL_RAM_SIZE
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| /Zephyr-latest/subsys/demand_paging/backing_store/ |
| D | Kconfig | 16 bool "RAM-based test backing store"
18 This implements a backing store using physical RAM pages that the
45 int "Number of pages for RAM backing store"
48 Number of pages of backing store memory to reserve in RAM. All test
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| /Zephyr-latest/include/zephyr/arch/nios2/ |
| D | linker.ld | 31 * _RAM_ADDR Beginning of RAM
32 * _RAM_SIZE Size of RAM in bytes
36 * 1. Non-XIP systems where the reset vector is at the beginning of RAM
39 * the exception vector is in RAM
51 #define ROMABLE_REGION RAM
53 #define RAMABLE_REGION RAM
63 RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
74 RAM (wx) : ORIGIN = _EXC_VECTOR, LENGTH = _RAM_SIZE - (_EXC_VECTOR - _RAM_ADDR)
180 /* Altera strongly recommends keeping exception entry code in RAM
201 #include <zephyr/linker/common-ram.ld>
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| /Zephyr-latest/boards/nxp/common/ |
| D | segger-ecc-systemview.rst | 15 supports ECC RAM. If the SEGGER tooling searches the ECC RAM space for the
16 control block a fault will occur, provided that ECC is enabled and the RAM
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| /Zephyr-latest/kernel/ |
| D | Kconfig.vm | 23 address from DTS, in which case RAM will be identity-mapped. Some
24 architectures may require RAM to be mapped in this way; they may have
25 just one RAM region and doing this makes linking much simpler, as
26 at least when the kernel boots all virtual RAM addresses are the same
30 Otherwise, if RAM isn't identity-mapped:
35 the kernel's address space, such as not overlapping physical RAM
36 regions if RAM is not identity-mapped, or the virtual and physical
50 if this is not the same offset from the beginning of RAM.
74 for mapping driver MMIO regions, as well as special RAM mapping use-cases
81 RAM size larger than the defined bounds of the virtual address space.
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| /Zephyr-latest/include/zephyr/drivers/sensor/ |
| D | grow_r502a.h | 76 * RAM buffers char_buf_1 and char_buf_2.
79 /** create template from feature files at RAM buffers
81 * back in both RAM buffers char_buf_1 and char_buf_2.
107 /** To load template from storage to RAM buffer of sensor*/
110 * device internal RAM buffer.
113 /** To template data stored in sensor's RAM buffer*/
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| /Zephyr-latest/soc/ite/ec/it8xxx2/ |
| D | Kconfig | 184 code placed in the .__ram_code section out of RAM. This consumes RAM in
187 that writes to the internal Flash) must execute out of RAM.
190 bool "Place exception handling code in RAM"
206 bool "Place serial handling code in RAM"
214 bool "Place kernel handling code in RAM"
221 bool "Place zephyr handling code in RAM"
231 We place SHA256 message, hash and key data (total 512bytes) in RAM.
233 first 4KB of RAM.
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