Home
last modified time | relevance | path

Searched +full:pre +full:- +full:fetch (Results 1 – 25 of 37) sorted by relevance

12

/Zephyr-latest/doc/hardware/peripherals/sensor/
Dread_and_decode.rst1 .. _sensor-read-and-decode:
14 Benefits over :ref:`sensor-fetch-and-get`
19 that have been run into with :ref:`sensor-fetch-and-get`.
25 functions that work on vectors of data to be done (e.g. low-pass filters, FFT,
40 * Requesting multiple reads to the same device for Ping-Pong (double buffering)
45 * Potentially pre-programming DMAs to trigger on GPIO events, leaving the CPU
48 Additionally, other shortcomings of :ref:`sensor-fetch-and-get` related to memory
52 * Triggers can be setup to automatically fetch data. Potentially
53 enabling pre-programmed DMA transfers on GPIO interrupts.
71 channels to poll. Requesting either blocking or non-blocking reads, then
/Zephyr-latest/doc/develop/west/
Dzephyr-cmds.rst1 .. _west-zephyr-ext-cmds:
6 This page documents miscellaneous :ref:`west-zephyr-extensions`.
8 .. _west-boards:
21 specify the display format yourself you can use the ``--format`` (or ``-f``)
24 west boards -f "{arch}:{name}"
28 west boards -h
30 .. _west-completion:
40 - bash
41 - zsh
42 - fish
[all …]
/Zephyr-latest/dts/bindings/ethernet/
Dsnps,dwcxgmac.yaml2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
[all …]
/Zephyr-latest/doc/_extensions/zephyr/kconfig/static/
Dkconfig.mjs3 * SPDX-License-Identifier: Apache-2.0
34 admonitionTitle.className = 'admonition-title';
81 literal.className = 'pre';
126 /* using HTML since element content is pre-formatted */
161 /* using HTML since default content may be pre-formatted */
176 /* using HTML since default content may be pre-formatted */
181 <span class"pre">${entry[1]}</span>
210 title.className = 'sig sig-object';
214 name.className = 'pre';
244 promptTitleText.nodeValue = 'No prompt - not directly user assignable.';
[all …]
/Zephyr-latest/boards/arduino/giga_r1/doc/
Dindex.rst10 STM32H747XI, a dual core ARM Cortex-M7 + Cortex-M4 MCU, with 2MBytes of Flash
15 - RGB LED
16 - Reset and Boot buttons
17 - USB-C device
18 - USB Host
19 - 16MB external QSPI flash
20 - 8MB external SDRAM
21 - Murata Type 1DX Bluetooth + WiFi module (CYW4343W based)
22 - Audio jack
23 - ATECC608A secure element
[all …]
/Zephyr-latest/boards/arduino/nicla_vision/doc/
Dindex.rst10 STM32H747GAII, a dual core ARM Cortex-M7 + Cortex-M4 MCU, with 2MBytes of Flash
15 - RGB LED
16 - Reset Boot button
17 - USB device
18 - Murata Type 1DX Bluetooth + WiFi module (CYW4343W based)
19 - GC2145 2 Megapixel Camera Sensor
20 - SE050C2HQ1 Crypto IC
21 - MP34DT06JTR Omnidirectional Microphone
22 - VL53L1CBV0FY ToF Sensor
23 - LSM6DSOXTR Gyro+Accelerometer Sensor
[all …]
/Zephyr-latest/doc/contribute/
Dbin_blobs.rst1 .. _bin-blobs:
12 Zephyr supports downloading and using third-party binary blobs via its built-in
15 `upstream (vanilla) Zephyr <https://github.com/zephyrproject-rtos/zephyr>`_.
18 the support for binary blobs in forks or third-party distributions of Zephyr. In
21 therefore free to create Zephyr-based downstream software which uses binary
30 click-through or other EULA-like workflow when users fetch and install blobs.
35 Blobs must be hosted on the Internet and managed by third-party infrastructure.
45 Blobs are fetched from official third-party sources by the :ref:`west blobs
46 <west-blobs>` command.
49 <modules-bin-blobs>` files included in separate Zephyr :ref:`module repositories
[all …]
Dguidelines.rst6 As an open-source project, we welcome and encourage the community to submit
24 https://github.com/zephyrproject-rtos/zephyr/blob/main/LICENSE
26 .. _GitHub repo: https://github.com/zephyrproject-rtos/zephyr
38 https://www.zephyrproject.org/faqs/#1571346989065-9216c551-f523
41 https://www.whitesourcesoftware.com/whitesource-blog/top-10-apache-license-questions-answered/
64 See :ref:`external-contributions` for more information about
84 https://www.linuxfoundation.org/blog/copyright-notices-in-open-source-software-projects/
97 later in this document), the developer simply adds a ``Signed-off-by``
104 .. code-block:: none
129 sign-off) is maintained indefinitely and may be redistributed
[all …]
/Zephyr-latest/arch/xtensa/core/startup/
Dreset_vector.S3 * SPDX-License-Identifier: Apache-2.0
10 #include <xtensa/xtensa-xer.h>
11 #include <xtensa/xdm-regs.h>
14 #include <xtensa/xtruntime-core-state.h>
42 .size __start, . - __start
57 #warning "Xtensa TX reset vector not at start of iram0, irom0, or uram0 -- ROMing LSPs may not work"
76 * Even if the processor supports the non-PC-relative L32R option,
77 * it will always start up in PC-relative mode. We take advantage of
78 * this, and use PC-relative mode at least until we're sure the .lit4
81 .begin no-absolute-literals
[all …]
/Zephyr-latest/drivers/usb/device/
Dusb_dc_sam_usbhs.c4 * SPDX-License-Identifier: Apache-2.0
30 * The new Atmel DFP headers provide mode-specific interrupt register field
54 BUILD_ASSERT(USB_MAXIMUM_SPEED, "low-speed is not supported");
75 PMC->CKGR_UCKR |= CKGR_UCKR_UPLLEN; in usb_dc_enable_clock()
78 while (!(PMC->PMC_SR & PMC_SR_LOCKU)) { in usb_dc_enable_clock()
83 if ((USBHS->USBHS_DEVCTRL & USBHS_DEVCTRL_SPDCONF_Msk) in usb_dc_enable_clock()
86 PMC->PMC_MCKR &= ~PMC_MCKR_UPLLDIV2; in usb_dc_enable_clock()
87 PMC->PMC_USB = PMC_USB_USBDIV(9) | PMC_USB_USBS; in usb_dc_enable_clock()
90 PMC->PMC_SCER |= PMC_SCER_USBCLK; in usb_dc_enable_clock()
98 PMC->PMC_SCER &= ~PMC_SCER_USBCLK; in usb_dc_disable_clock()
[all …]
Dusb_dc_kinetis.c1 /* usb_dc_kinetis.c - Kinetis USBFSOTG usb device driver */
6 * SPDX-License-Identifier: Apache-2.0
152 SIM->SOPT1 |= SIM_SOPT1_USBREGEN_MASK; in kinetis_usb_init()
155 USB0->USBTRC0 |= USB_USBTRC0_USBRESET_MASK; in kinetis_usb_init()
158 USB0->CTL = 0; in kinetis_usb_init()
160 USB0->CTL |= USB_CTL_USBENSOFEN_MASK; in kinetis_usb_init()
162 if ((USB0->PERID != USBFSOTG_PERID) || in kinetis_usb_init()
163 (USB0->REV != USBFSOTG_REV)) { in kinetis_usb_init()
164 return -1; in kinetis_usb_init()
167 USB0->BDTPAGE1 = (uint8_t)(((uint32_t)bdt) >> 8); in kinetis_usb_init()
[all …]
/Zephyr-latest/arch/arm/core/cortex_m/
Dswap_helper.S2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 * Copyright (c) 2017-2019 Nordic Semiconductor ASA.
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief Thread context switching for ARM Cortex-M
14 * on ARM Cortex-M CPUs.
52 * For Cortex-M, z_arm_pendsv() is invoked with no arguments.
78 /* addr of callee-saved regs in thread in r0 */
82 /* save callee-saved + psp in thread */
86 /* Store current r4-r7 */
87 stmea r0!, {r4-r7}
[all …]
/Zephyr-latest/doc/kernel/usermode/
Dmemory_domain.rst24 - Any configuration of memory regions which need to have special caching or
25 write-back policies for basic hardware and driver function. Note that most
30 ARMv7-M/ARMv8-M this is called the System Address Map, other CPUs may
34 - A read-only, executable region or regions for program text and ro-data, that
35 is accessible to user mode. This could be further sub-divided into a
36 read-only region for ro-data, and a read-only, executable region for text, but
38 threads running in user mode can read ro-data and fetch instructions.
40 - Depending on configuration, user-accessible read-write regions to support
45 text/ro-data, this is sufficient for the boot time configuration.
53 individual stack frames, use compiler-assisted :kconfig:option:`CONFIG_STACK_CANARIES`
[all …]
/Zephyr-latest/drivers/sensor/st/vl53l0x/
Dvl53l0x.c1 /* vl53l0x.c - Driver for ST VL53L0X time of flight sensor */
8 * SPDX-License-Identifier: Apache-2.0
31 * https://www.st.com/en/embedded-software/stsw-img005.html
33 * https://www.st.com/en/embedded-software/stm32cubel4.html
60 struct vl53l0x_data *drv_data = dev->data; in vl53l0x_setup_single_shot()
67 ret = VL53L0X_StaticInit(&drv_data->vl53l0x); in vl53l0x_setup_single_shot()
70 dev->name); in vl53l0x_setup_single_shot()
74 ret = VL53L0X_PerformRefCalibration(&drv_data->vl53l0x, in vl53l0x_setup_single_shot()
79 dev->name); in vl53l0x_setup_single_shot()
83 ret = VL53L0X_PerformRefSpadManagement(&drv_data->vl53l0x, in vl53l0x_setup_single_shot()
[all …]
/Zephyr-latest/arch/arm/core/cortex_a_r/
Dswap_helper.S2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 * Copyright (c) 2017-2019 Nordic Semiconductor ASA.
6 * SPDX-License-Identifier: Apache-2.0
11 * @brief Thread context switching for ARM Cortex-A and Cortex-R
14 * on ARM Cortex-A and Cortex-R CPUs.
40 * For Cortex-R, this function is directly called either by z_arm_{exc,int}_exit
62 /* addr of callee-saved regs in thread in r0 */
68 stm r0, {r4-r11, sp}
73 tst r0, #K_FP_REGS /* arch_current_thread()->base.user_options & K_FP_REGS */
81 * used since this thread has used it. Consequently, the caller-saved
[all …]
/Zephyr-latest/soc/microchip/mec/mec15xx/
Dsoc_espi_saf_v1.h4 * SPDX-License-Identifier: Apache-2.0
60 /* QMSPI descriptors 12-15 for all SPI flash devices */
64 * QMSPI descriptors 12-13 are exit continuous mode
84 * QMSPI descriptors 14-15 are poll 16-bit flash status
106 /* SAF Pre-fetch optimization mode */
112 * SAF Opcode 32-bit register value.
113 * Each byte contain a SPI flash 8-bit opcode.
117 * op0 = SPI flash write-enable opcode
127 * op0 = SPI flash read 1-4-4 continuous mode opcode
128 * op1 = SPI flash op0 mode byte value for non-continuous mode
[all …]
/Zephyr-latest/include/zephyr/drivers/
Ddai.h4 * SPDX-License-Identifier: Apache-2.0
48 * clock-related configurations w.r.t the DAI
164 /** @brief Optional - Pre Start the transmission / reception of data.
188 /** @brief Optional - Post Stop the transmission / reception of data.
354 const struct dai_driver_api *api = (const struct dai_driver_api *)dev->api; in dai_probe()
356 return api->probe(dev); in dai_probe()
371 const struct dai_driver_api *api = (const struct dai_driver_api *)dev->api; in dai_remove()
373 return api->remove(dev); in dai_remove()
385 * If the function is called with the parameter cfg->frame_clk_freq set to 0
393 * @retval -EINVAL Invalid argument.
[all …]
/Zephyr-latest/share/sysbuild/cmake/modules/
Dsysbuild_extensions.cmake1 # Copyright (c) 2021-2023 Nordic Semiconductor
3 # SPDX-License-Identifier: Apache-2.0
23 file(STRINGS "${LOAD_CACHE_BINARY_DIR}/CMakeCache.txt" cache_strings ENCODING UTF-8)
25 # Using a regex for matching whole 'VAR_NAME:TYPE=VALUE' will strip semi-colons
27 # Therefore we first fetch VAR_NAME and TYPE, and afterwards extract
29 # This method ensures that both quoted values and ;-separated list stays intact.
33 string(SUBSTRING "${str}" ${variable_identifier_length} -1 variable_value)
47 # sysbuild_get(<variable> IMAGE <image> [VAR <image-variable>] <KCONFIG|CACHE>)
86 "Please use sysbuild_get(<variable> ... VAR <image-variable>) "
123 # guaranteed to be up-to-date.
[all …]
/Zephyr-latest/scripts/west_commands/completion/
Dwest-completion.bash1 # Bash auto-completion for west subcommands and flags. To initialize, run
3 # source west-completion.bash
7 __west_previous_extglob_setting=$(shopt -p extglob)
8 shopt -s extglob
12 # bash_completion - programmable completion functions for bash 3.2+
14 # Copyright © 2006-2008, Ian Macdonald <ian@caliban.org>
15 # © 2009-2010, Bash Completion Maintainers
16 # <bash-completion-devel@lists.alioth.debian.org>
33 # http://bash-completion.alioth.debian.org/
41 # if test "${words_[cword_-1]}" = -w
[all …]
/Zephyr-latest/soc/microchip/mec/mec172x/
Dsoc_espi_saf_v2.h4 * SPDX-License-Identifier: Apache-2.0
41 * Boot-ROM OTP configuration.
70 /* QMSPI descriptors 12-15 for all SPI flash devices */
72 /* QMSPI descriptors 12-13 are exit continuous mode */
108 * QMSPI descriptors 14-15 are poll 16-bit flash status
130 /* SAF Pre-fetch optimization mode */
136 * SAF Opcode 32-bit register value.
137 * Each byte contain a SPI flash 8-bit opcode.
141 * op0 = SPI flash write-enable opcode
151 * op0 = SPI flash read 1-4-4 continuous mode opcode
[all …]
Dsoc.h4 * SPDX-License-Identifier: Apache-2.0
14 * eight regions. Zephyr has an in-tree CMSIS header located in the arch
16 * from hal_cmsis based on the k-config CPU selection.
17 * The Zephyr in-tree header does not provide all the symbols ARM CMSIS
19 * MPU present to 0. We define these two symbols here based on our k-config
20 * selections. NOTE: Zephyr in-tree CMSIS defines the Cortex-M4 hardware
33 #define __ICACHE_PRESENT 0 /*!< Set to 1 if I-Cache is present */
34 #define __DCACHE_PRESENT 0 /*!< Set to 1 if D-Cache is present */
37 /** @brief ARM Cortex-M4 NVIC Interrupt Numbers
39 * negative numbers [-15, -1]. Lower numerical value indicates higher
[all …]
/Zephyr-latest/scripts/footprint/
Dsize_report3 # Copyright (c) 2016, 2020-2024 Intel Corporation
5 # SPDX-License-Identifier: Apache-2.0
49 DT_LOCATION = re.compile(r"\(DW_OP_addr: ([0-9a-f]+)\)")
129 Fetch the symbols from the symbol table and put them
189 sec_end = sec_start + (sec_size - 1 if sec_size else 0)
191 f"0x{sec_start:08x}-0x{sec_end:08x} "
213 sec_end = sec_start + (size - 1 if size else 0)
268 file_entry = lineprog['file_entry'][file_index - 1]
274 directory = lineprog.header['include_directory'][dir_index - 1]
288 # built-ins can't be resolved, so it's not an issue
[all …]
/Zephyr-latest/soc/microchip/mec/mec172x/reg/
Dmec172x_espi_saf.h4 * SPDX-License-Identifier: Apache-2.0
33 /* SAF Protection region described by 4 32-bit registers. 17 regions */
535 /* Allow pre-fetch from flash devices */
572 /** @brief SAF protection regions contain 4 32-bit registers. */
596 struct mchp_espi_saf_op SAF_CS_OP[2]; /* 0x4c - 0x6b */
600 volatile uint32_t SAF_TAG_MAP[3]; /* 0x78 - 0x83 */
601 struct mchp_espi_saf_pr SAF_PROT_RG[17]; /* 0x84 - 0x193 */
635 uint32_t RSVD1[(0x2b8 - 0x01c) / 4];
/Zephyr-latest/doc/releases/
Drelease-notes-1.6.rst7 release introduces the unified Kernel replacing the separate nano- and
8 micro-kernels and simplifying the overall Zephyr architecture and programming
10 Support for the ARM Cortex-M0/M0+ family was added and board support for
11 Cortex-M was expanded.
22 * Added support for several ARM Cortex-M boards
34 * Added DLIST to operate in all elements of a doubly-linked list.
35 * SLIST: Added sys_slist_get() to fetch and remove the head, also Added
52 * ARM: Added support for ARM Cortex-M0/M0+.
55 * x86: Changed IRQ controller to return -1 if cannot determine source vector.
99 * Added raw HCI API to enable physical HCI transport for a Controller-only build.
[all …]
/Zephyr-latest/kernel/include/
Dkernel_arch_interface.h4 * SPDX-License-Identifier: Apache-2.0
11 * Not all architecture-specific defines are here, APIs that are used
30 * @defgroup arch-timing Architecture timing APIs
35 * Architecture-specific implementation of busy-waiting
45 * @defgroup arch-threads Architecture thread APIs
46 * @ingroup arch-interface
50 /** Handle arch-specific logic for setting up new threads
52 * The stack and arch-specific thread state variables must be set up
64 * randomization and thread-local storage.
66 * Fields in thread->base will be initialized when this is called.
[all …]

12