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/Zephyr-latest/drivers/pinctrl/
Dpinctrl_nrf.c44 #define NRF_PSEL_UART(reg, line) ((NRF_UART_Type *)reg)->PSEL##line
47 #define NRF_PSEL_UART(reg, line) ((NRF_UARTE_Type *)reg)->PSEL.line
51 #define NRF_PSEL_SPIM(reg, line) ((NRF_SPI_Type *)reg)->PSEL##line
54 #define NRF_PSEL_SPIM(reg, line) ((NRF_SPIM_Type *)reg)->PSEL.line
60 #define NRF_PSEL_SPIS(reg, line) ((NRF_SPIS_Type *)reg)->PSEL##line
62 #define NRF_PSEL_SPIS(reg, line) ((NRF_SPIS_Type *)reg)->PSEL.line
68 #define NRF_PSEL_TWIM(reg, line) ((NRF_TWI_Type *)reg)->PSEL##line
70 #define NRF_PSEL_TWIM(reg, line) ((NRF_TWI_Type *)reg)->PSEL.line
74 #define NRF_PSEL_TWIM(reg, line) ((NRF_TWIM_Type *)reg)->PSEL.line
78 #define NRF_PSEL_I2S(reg, line) ((NRF_I2S_Type *)reg)->PSEL.line
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-ra-common.h25 #define RA_PINCFG(port, pin, psel, opt) \ argument
26 ((((psel)&PSEL_MASK) << PSEL_POS) | (((pin)&PIN_MASK) << PIN_POS) | \
31 #define RA_PINCFG__40(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
35 #define RA_PINCFG__48(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
39 #define RA_PINCFG__64(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
43 #define RA_PINCFG_100(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
Dpinctrl-ra.h53 #define RA_PSEL(psel, port_num, pin_num) \ argument
54 (1 << RA_MODE_POS | psel << RA_PSEL_POS | port_num << RA_PORT_NUM_POS | \
/Zephyr-latest/soc/nordic/common/
Dsoc_nrf_common.h19 * @brief Get a PSEL value out of a foo-gpios or foo-pin devicetree property
22 * configuration as a PSEL value directly instead of using a 'foo-gpios'
29 * helper macro can be used to get a PSEL value out of the devicetree
41 * @return PSEL register value taken from psel_prop or gpios_prop, whichever
43 * to a PSEL register value first.
56 * 'node_id' has both a legacy psel-style property and a gpios
62 * @param psel_prop lowercase-and-underscores PSEL style property
95 * @brief Convert a devicetree GPIO phandle+specifier to PSEL value
98 * usually have PSEL in their names. The low bits of these registers
110 * - pin P0.4 has "PSEL value" 4 (B=0 and A=4)
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/Zephyr-latest/dts/bindings/comparator/
Dnordic,nrf-comp.yaml28 psel = "AIN0";
52 psel = "AIN0";
70 psel:
Dnordic,nrf-lpcomp.yaml24 psel = "AIN0";
44 psel:
/Zephyr-latest/samples/boards/nordic/system_off/boards/
Dnrf54l15dk_nrf54l15_cpuapp_comparator.overlay3 psel = "AIN4";
/Zephyr-latest/drivers/pwm/
Dpwm_nrfx.c128 static bool channel_psel_get(uint32_t channel, uint32_t *psel, in channel_psel_get() argument
131 *psel = nrf_pwm_pin_get(config->pwm.p_reg, (uint8_t)channel); in channel_psel_get()
133 return (((*psel & PWM_PSEL_OUT_CONNECT_Msk) >> PWM_PSEL_OUT_CONNECT_Pos) in channel_psel_get()
204 uint32_t psel; in pwm_nrfx_set_cycles() local
206 if (channel_psel_get(channel, &psel, config)) { in pwm_nrfx_set_cycles()
213 nrf_gpio_pin_write(psel, out_level); in pwm_nrfx_set_cycles()
285 uint32_t psel; in pwm_resume() local
287 if (channel_psel_get(i, &psel, config)) { in pwm_resume()
292 initially_inverted |= nrf_gpio_pin_out_read(psel) ? in pwm_resume()
/Zephyr-latest/tests/drivers/build_all/comparator/nrf_lpcomp/
Dext_ref.overlay9 psel = "AIN0";
Dint_ref.overlay9 psel = "AIN0";
/Zephyr-latest/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/
Dnrf5340dk_nrf5340_cpuapp.overlay9 psel = "AIN0"; /* P0.04 */
Dnrf54h20dk_nrf54h20_cpuapp.overlay9 psel = "AIN2"; /* P1.02 */
Dnrf54l15dk_nrf54l15_cpuapp.overlay9 psel = "AIN4"; /* P1.11 */
/Zephyr-latest/tests/drivers/build_all/comparator/nrf_comp/
Ddiff.overlay9 psel = "AIN0";
Dse.overlay9 psel = "AIN0";
Dse_aref.overlay9 psel = "AIN0";
/Zephyr-latest/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/
Dnrf5340dk_nrf5340_cpuapp.overlay9 psel = "AIN0"; /* P0.04 */
Dnrf54h20dk_nrf54h20_cpuapp.overlay9 psel = "AIN2"; /* P1.02 */
Dnrf54l15dk_nrf54l15_cpuapp.overlay9 psel = "AIN4"; /* P1.11 */
/Zephyr-latest/boards/nordic/nrf9160dk/
Dboard.c228 uint32_t psel = NRF_DT_GPIOS_TO_PSEL(EXT_MEM_CTRL, control_gpios); in early_init() local
232 nrf_gpio_pin_clear(psel); in early_init()
234 nrf_gpio_pin_set(psel); in early_init()
236 nrf_gpio_cfg_output(psel); in early_init()
/Zephyr-latest/include/zephyr/drivers/comparator/
Dnrf_comp.h107 enum comp_nrf_comp_psel psel; member
137 enum comp_nrf_comp_psel psel; member
/Zephyr-latest/dts/common/nordic/
Dnrf_common.dtsi27 * control in a distributed way (GPIO registers and PSEL
/Zephyr-latest/drivers/comparator/
Dcomparator_nrf_comp.c46 _CONCAT(COMP_NRF_COMP_PSEL_, DT_INST_STRING_TOKEN(inst, psel))
192 .psel = SHIM_NRF_COMP_DT_INST_PSEL(0),
204 .psel = SHIM_NRF_COMP_DT_INST_PSEL(0),
550 if (shim_nrf_comp_psel_to_nrf(shim->psel, &nrf->input)) { in shim_nrf_comp_se_config_to_nrf()
597 if (shim_nrf_comp_psel_to_nrf(shim->psel, &nrf->input)) { in shim_nrf_comp_diff_config_to_nrf()
Dcomparator_nrf_lpcomp.c30 _CONCAT(COMP_NRF_LPCOMP_PSEL_, DT_INST_STRING_TOKEN(inst, psel))
84 .psel = SHIM_NRF_LPCOMP_DT_INST_PSEL(0),
339 if (shim_nrf_lpcomp_psel_to_nrf(shim->psel, &nrf->input)) { in shim_nrf_lpcomp_config_to_nrf()
/Zephyr-latest/dts/bindings/net/wireless/
Dnordic,nrf-radio.yaml49 corresponding PSEL.DFEGPIO[n] register.
52 since which PSEL.DFEGPIO[n] registers will be used to drive

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