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/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.h17 * @brief Write @p value to a PS/2 device via the PS/2 controller.
19 * @param dev Pointer to the device structure for PS/2 controller instance.
20 * @param channel_id Channel ID of the PS/2 to write data.
21 * @param value the data write to the PS/2 device.
25 * @retval -ETIMEDOUT Timeout occurred for a PS/2 write transaction.
31 * @brief Set the PS/2 controller to turn on/off the PS/2 channel.
33 * @param dev Pointer to the device structure for PS/2 controller instance.
34 * @param channel_id Channel ID of the PS/2 to enable or disable.
44 * @brief Record the callback_isr function pointer for the given PS/2 channel.
46 * @param dev Pointer to the device structure for PS/2 controller instance.
[all …]
DKconfig1 # PS/2 configuration options
7 bool "PS/2 drivers"
9 Include PS/2 drivers in system config.
21 int "PS/2 driver init priority"
24 PS/2 device driver initialization priority.
Dps2_npcx_channel.c11 * @brief Nuvoton NPCX PS/2 driver
13 * This file contains the driver of PS/2 buses (channels) which provides the
14 * connection between Zephyr PS/2 API functions and NPCX PS/2 controller driver
15 * to support PS/2 transactions.
31 /* Indicate the channel's number of the PS/2 channel device */
38 /* PS/2 api functions */
78 /* PS/2 driver registration */
89 /* Configure pin-mux for PS/2 device */ in ps2_npcx_channel_init()
107 /* PS/2 channel initialization macro functions */
125 /* PS/2 channel driver must be initialized after PS/2 controller driver */
DKconfig.npcx12 Enable the NPCX family PS2 driver. It provides four PS/2 channels.
15 PS/2-compatible pointing device.The driver also depends on the KBC
21 int "PS/2 channel driver init priority"
24 PS/2 channel device driver initialization priority.
26 NPCX PS/2 controller device driver should initialize
Dps2_npcx_controller.c11 * @brief Nuvoton NPCX PS/2 module (controller) driver
13 * This file contains the driver of PS/2 module (controller) which provides a
15 * The hardware accelerator mechanism is shared by four PS/2 channels.
39 * The max duration of a PS/2 clock is about 100 micro-seconds.
40 * A PS/2 transaction needs 11 clock cycles. It will take about 1.1 ms for a
54 * Bit mask to record the enabled PS/2 channels.
59 /* The mutex of the PS/2 controller */
64 * The callback function to handle the data received from PS/2 device
184 /* Set PS/2 in transmit mode */ in ps2_npcx_ctrl_write()
201 LOG_ERR("PS/2 Tx timeout"); in ps2_npcx_ctrl_write()
[all …]
/Zephyr-latest/samples/drivers/ps2/
DREADME.rst2 :name: PS/2 interface
5 Communicate with a PS/2 mouse.
10 This sample demonstrates how to use the :ref:`PS/2 API <ps2_api>`.
17 The sample can be built and executed on boards supporting PS/2.
18 It requires a correct fixture setup. Please connect a PS/2 mouse in order to
30 PS/2 test with mouse
/Zephyr-latest/doc/hardware/peripherals/
Dps2.rst4 PS/2
9 The PS/2 connector first hit the market in 1987 on
13 superseded PS/2 and is the modern peripheral device
15 with a PS/2 connector, Zephyr provides these PS/2 driver APIs.
/Zephyr-latest/subsys/secure_storage/
DKconfig78 prompt "Protected Storage (PS) API implementation"
82 bool "PS calls directly into the ITS"
84 The PS API doesn't have an implementation of its own, and directly calls into the ITS API.
85 This means that the implementation of the PS API will be identical to that of the ITS API.
88 bool "Custom PS implementation"
90 A custom implementation of the PS API is present.
91 Implement the functions declared in <zephyr/secure_storage/ps.h>.
97 bool "PS API implementation supports psa_ps_create() and psa_ps_set_extended()"
/Zephyr-latest/arch/xtensa/include/
Dxtensa_stack.h31 * @note When @ps == UINT32_MAX, it checks the whole range of stack
32 * object because we cannot get PS via frame pointer yet.
36 * @param ps PS register value of interrupted context. Use UINT32_MAX if
37 * PS cannot be determined at time of call.
41 bool xtensa_is_outside_stack_bounds(uintptr_t addr, size_t sz, uint32_t ps);
Dxtensa_asm2_s.h30 * EXCM and WOE bit be enabled in PS, and relies on repeated hardware
164 * Does not populate or modify the PS/PC save locations.
346 * area) in A3. Exceptions should be enabled via PS.EXCM, but
347 * PS.INTLEVEL must (!) be set such that no nested interrupts can
379 wsr.ps a2
395 * PS/PC already spilled to the stack in the BSA, and A2 containing a
440 rsr.ps a0
445 wsr.ps a0
461 rsr.ps a0
465 rsr.ps a0
[all …]
/Zephyr-latest/samples/boards/nordic/mesh/onoff_level_lighting_vnd_app/src/
Dstorage.c17 settings_save_one("ps/rc", &reset_counter, sizeof(reset_counter)); in save_reset_counter()
22 settings_save_one("ps/gdtt", &ctl->tt, sizeof(ctl->tt)); in save_gen_def_trans_time_state()
27 settings_save_one("ps/gpo", &ctl->onpowerup, sizeof(ctl->onpowerup)); in save_gen_onpowerup_state()
36 settings_save_one("ps/ld", &ctl->light->def, sizeof(ctl->light->def)); in save_def_states()
37 settings_save_one("ps/td", &ctl->temp->def, sizeof(ctl->temp->def)); in save_def_states()
38 settings_save_one("ps/dd", &ctl->duv->def, sizeof(ctl->duv->def)); in save_def_states()
43 settings_save_one("ps/ll", &ctl->light->last, sizeof(ctl->light->last)); in save_lightness_last_state()
50 settings_save_one("ps/llt", &ctl->light->target, in save_last_target_states()
53 settings_save_one("ps/tlt", &ctl->temp->target, in save_last_target_states()
56 settings_save_one("ps/dlt", &ctl->duv->target, in save_last_target_states()
[all …]
/Zephyr-latest/arch/xtensa/core/
Dcrt1.S59 * via PS.INTLEVEL and/or INTENABLE
61 * - PS not initialized
89 * Now that sp (a1) is set, we can set PS as per the application (user
96 * PS.WOE = 0
97 * PS.UM = 1
98 * PS.EXCM = 0
99 * PS.INTLEVEL = XCHAL_EXCM_LEVEL
104 * PS.WOE = 1
105 * PS.UM = 1
106 * PS.EXCM = 0
[all …]
Dvector_handlers.c34 bool xtensa_is_outside_stack_bounds(uintptr_t addr, size_t sz, uint32_t ps) in xtensa_is_outside_stack_bounds() argument
42 * check for PS == UINT32_MAX for special treatment. in xtensa_is_outside_stack_bounds()
44 ARG_UNUSED(ps); in xtensa_is_outside_stack_bounds()
72 } else if (ps == UINT32_MAX) { in xtensa_is_outside_stack_bounds()
73 /* Since the stashed PS is inside struct pointed by frame->ptr_to_bsa, in xtensa_is_outside_stack_bounds()
75 * pointer within the thread stack. Also without PS, we have no idea in xtensa_is_outside_stack_bounds()
86 } else if (((ps & PS_RING_MASK) == 0U) && in xtensa_is_outside_stack_bounds()
130 if (xtensa_is_outside_stack_bounds((uintptr_t)frame, sizeof(*frame), bsa->ps)) { in xtensa_is_frame_pointer_valid()
224 uint32_t ps, vaddr; in print_fatal_exception() local
248 ps = bsa->ps; in print_fatal_exception()
[all …]
Duserspace.S37 rsr.ps a2
67 rsr.ps a2
81 rsr.ps a3
85 wsr.ps a3
189 wsr.ps a0
242 wsr.ps a3
337 /* Configuring PS register.
/Zephyr-latest/include/zephyr/drivers/
Dps2.h9 * @brief Public API for PS/2 devices such as keyboard and mouse.
27 * @brief PS/2 Driver APIs
28 * @defgroup ps2_interface PS/2 Driver APIs
34 * @brief PS/2 callback called when user types or click a mouse.
70 * @param callback_isr called when PS/2 devices reply to a configuration
89 * @brief Write to PS/2 device.
108 * @brief Read slave-to-host values from PS/2 device.
110 * @param value Pointer used for reading the PS/2 device.
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,imx7d-pinctrl.yaml14 bias-pull-up: PE=1, PS=<bias-pull-up-value index>
15 bias-pull-down: PE=1, PS=0
24 PS=0,
30 Note that pins marked with LPSR can only have their PE and PS registers
88 Select pull up resistor value. Sets PS field in IOMUXC peripheral.
/Zephyr-latest/drivers/gpio/
Dgpio_xlnx_ps.c33 * @brief Initialize a Xilinx PS GPIO controller parent device
35 * Initialize a Xilinx PS GPIO controller parent device, whose task it is
41 * @param dev Pointer to the PS GPIO controller's device.
71 * @brief Xilinx PS GPIO controller parent device ISR
73 * Interrupt service routine for the Xilinx PS GPIO controller's
80 * @param dev Pointer to the PS GPIO controller's device.
155 * Top-level device initialization macro, executed for each PS GPIO
Dgpio_xlnx_ps.h21 * This struct contains all data of the PS GPIO controller parent
34 * This struct contains all data of the PS GPIO controller parent
/Zephyr-latest/subsys/secure_storage/include/internal/zephyr/secure_storage/
Dps.h7 /** @file zephyr/secure_storage/ps.h The secure storage PS implementation.
9 * The functions declared in this header implement the PSA PS API
/Zephyr-latest/drivers/timer/
DKconfig.xlnx_psttc7 bool "Xilinx PS ttc timer support"
17 int "Xilinx PS ttc timer index"
/Zephyr-latest/samples/tfm_integration/psa_protected_storage/
DREADME.rst4 Use the Protected Storage (PS) API to store encrypted data.
9 This sample demonstrates how the Protected Storage (PS) API can be used for storing data.
16 Using the PS API, this sample stores data to non-volatile storage. The sample shows how data can
19 TF-M includes a maximum number of PS records, set via ``PS_NUM_ASSETS`` (default 10 as of
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dpower.c61 uint32_t ps; member
87 core_desc[core_id].ps = XTENSA_RSR("PS"); in _save_core_context()
98 XTENSA_WSR("PS", core_desc[core_id].ps); in _restore_core_context()
123 " wsr a2, PS\n\t"
192 * Just set PS.INTLEVEL to 0. in pm_state_exit_post_ops()
/Zephyr-latest/dts/arm/xilinx/
Dzynqmp.dtsi213 compatible = "xlnx,ps-gpio";
224 compatible = "xlnx,ps-gpio-bank";
233 compatible = "xlnx,ps-gpio-bank";
242 compatible = "xlnx,ps-gpio-bank";
251 compatible = "xlnx,ps-gpio-bank";
260 compatible = "xlnx,ps-gpio-bank";
269 compatible = "xlnx,ps-gpio-bank";
Dzynq7000.dtsi124 compatible = "xlnx,ps-gpio";
135 compatible = "xlnx,ps-gpio-bank";
144 compatible = "xlnx,ps-gpio-bank";
153 compatible = "xlnx,ps-gpio-bank";
162 compatible = "xlnx,ps-gpio-bank";
/Zephyr-latest/doc/services/
Dsecure_storage.rst41 * does not yet provide an implementation of the Protected Storage (PS) API as of this writing.
43 Instead, the PS API directly calls into the Internal Trusted Storage (ITS) API
44 (unless a `custom implementation <#whole-api>`_ of the PS API is provided).
91 If you already have an implementation of the whole ITS or PS API and want to make use of it, you
95 * :kconfig:option:`CONFIG_SECURE_STORAGE_PS_IMPLEMENTATION_CUSTOM`, for the PS API.

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