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/Zephyr-latest/include/zephyr/audio/
Ddmic.h68 * PDM Channels LEFT / RIGHT
76 * PDM Input/Output signal configuration
80 * @name Parameters common to all PDM controllers
96 * @name Parameters unique to each PDM controller
99 /** Bit mask to optionally invert PDM clock */
103 /** Collection of clock skew values for each PDM port */
111 * Configuration of the PCM streams to be output by the PDM hardware
128 * Mapping/ordering of the PDM channels to logical PCM output channel
138 * bit indicates LEFT/RIGHT selection of the PDM controller.
140 * The most significant 3 bits indicate the PDM controller number:
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/Zephyr-latest/drivers/dai/intel/dmic/
Ddmic_nhlt.h29 /* PDM channels to be programmed using data from channel_cfg array. */
31 /* i'th bit = 1 means that configuration for PDM channel # i is provided. */
37 /* Channel configuration, see PDM HW specification for details. */
54 /* FIR configuration, see PDM HW specification for details.
56 * If there is only one PDM controller configuration passed, the other (missing) one is configured
59 * The driver needs to make sure that all mics are disabled before starting to program PDM
72 /* PDM controller configuration, see PDM HW specification for details. */
80 /* PDM SoundWire Map
91 * one PDM controller. In this case, fir_coeffs array may be provided in a single copy
DKconfig.dmic7 bool "Intel digital PDM microphone driver support for DAI interface"
12 Enable Intel digital PDM microphone driver for DAI interface
23 and PDM bus and microphone parameters
Ddmic_nhlt.c23 /* Base addresses (in PDM scope) of 2ch PDM controllers and coefficient RAM. */
129 static int dai_nhlt_get_clock_div(const struct dai_intel_dmic *dmic, const int pdm) in dai_nhlt_get_clock_div() argument
134 val = dai_dmic_read(dmic, dmic_base[pdm] + CIC_CONFIG); in dai_nhlt_get_clock_div()
137 val = dai_dmic_read(dmic, dmic_base[pdm] + MIC_CONTROL); in dai_nhlt_get_clock_div()
140 val = dai_dmic_read(dmic, dmic_base[pdm] + in dai_nhlt_get_clock_div()
142 LOG_INF("pdm = %d, FIR_CONFIG = 0x%08X", pdm, val); in dai_nhlt_get_clock_div()
158 static int dai_nhlt_update_rate(struct dai_intel_dmic *dmic, const int clock_source, const int pdm) in dai_nhlt_update_rate() argument
162 rate_div = dai_nhlt_get_clock_div(dmic, pdm); in dai_nhlt_update_rate()
231 LOG_ERR("nhlt_dmic_dai_params_get(): Illegal IPM PDM controllers count %d", in dai_nhlt_dmic_dai_params_get()
651 /* Array of pointers to pdm coefficient data. Used to reuse coefficient from another pdm. */ in dai_dmic_set_config_nhlt()
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/Zephyr-latest/drivers/audio/
DKconfig.dmic_pdm_nrfx5 bool "nRF PDM nrfx driver"
13 Enable support for nrfx PDM driver for nRF MCU series.
Ddmic_nrfx_pdm.c25 const nrfx_pdm_t *pdm; member
59 nrfx_pdm_stop(drv_data->pdm); in stop_pdm()
85 err = nrfx_pdm_buffer_set(drv_data->pdm, buffer, drv_data->block_size / 2); in event_handler()
360 LOG_INF("PDM clock frequency: %u, actual PCM rate: %u", in find_suitable_clock()
421 nrfx_pdm_uninit(drv_data->pdm); in dmic_nrfx_pdm_configure()
446 LOG_ERR("Cannot find suitable PDM clock configuration."); in dmic_nrfx_pdm_configure()
451 nrfx_pdm_uninit(drv_data->pdm); in dmic_nrfx_pdm_configure()
455 err = nrfx_pdm_init(drv_data->pdm, &nrfx_cfg, drv_cfg->event_handler); in dmic_nrfx_pdm_configure()
457 LOG_ERR("Failed to initialize PDM: 0x%08x", err); in dmic_nrfx_pdm_configure()
479 err = nrfx_pdm_start(drv_data->pdm); in start_transfer()
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DKconfig.mpxxdtyy5 bool "ST Digital PDM microphone attached to I2S support"
Dmpxxdtyy-i2s.c107 /* check requested min pdm frequency */ in mpxxdtyy_i2s_configure()
113 /* check requested max pdm frequency */ in mpxxdtyy_i2s_configure()
Dmpxxdtyy.c58 /* calculate oversampling factor based on pdm clock */ in sw_filter_lib_init()
124 * The number of PDM bytes per PCM sample is the decimation factor in sw_filter_lib_run()
126 * PDM bytes equivalent to the number of PCM samples, times the number of in sw_filter_lib_run()
Ddmic_mcux.c88 /* PDM channel 0 must always be enabled, as the RM states: in dmic_mcux_activate_channels()
89 * "In order to output 8 channels of PDM Data, PDM_CLK01 must be used" in dmic_mcux_activate_channels()
90 * therefore, even if we don't intend to capture PDM data from the in dmic_mcux_activate_channels()
481 * check to make sure that the L/R channels of each PDM controller in dmic_mcux_configure()
665 /* Defines structure for a given PDM channel node */
683 /* Defines structures for all enabled PDM channels */
687 /* Gets pointer for a given PDM channel node */
692 /* Gets array of pointers to PDM channels */
726 /* Existing SoCs only have one PDM instance. */
/Zephyr-latest/dts/bindings/audio/
Dnordic,nrf-pdm.yaml4 description: Nordic PDM (Pulse Density Modulation interface)
6 compatible: "nordic,nrf-pdm"
27 Clock source to be used by the PDM peripheral. The following options
Dst,mpxxdtyy-i2s.yaml4 description: STMicroelectronics MPXXDTYY digital PDM microphone family
Dnxp,dmic.yaml27 the required PDM bit clock frequency by a factor of two, and can reduce
/Zephyr-latest/tests/drivers/audio/dmic_api/boards/
Dmimxrt595_evk_mimxrt595s_cm33.overlay7 /* Enable PDM channels 0-3,
8 * Gain settings are configured for testing with a PDM generator,
Drd_rw612_bga.overlay7 /* Enable PDM channels 0-3,
8 * Gain settings are configured for testing with a PDM generator,
/Zephyr-latest/samples/drivers/audio/dmic/
DREADME.rst5 Perform PDM transfers using different configurations.
12 It performs two PDM transfers with different configurations (using one channel
/Zephyr-latest/samples/shields/x_nucleo_iks02a1/microphone/
DREADME.rst14 The microphone generates a PDM stream which is acquired through I2S.
15 The PDM stream is then converted to PCM using the OpenPDM2PCM library
28 the PDM microphone clock and data lines get connected to SPI clock and MOSI.
75 The microphone PDM requested clock should lead the MP34DT05 driver to select an
78 See PCM and PDM configuration in file :zephyr_file:`samples/shields/x_nucleo_iks02a1/microphone/src…
/Zephyr-latest/samples/boards/96boards/argonkey/microphone/
DREADME.rst10 the on-board MP34DT05 microphone. The microphone generates a PDM
11 stream which is acquired through I2S. The PDM stream is then
64 The microphone PDM requested clock should lead the MP34DT05 driver to select an
67 See pcm and pdm configuration in file :zephyr_file:`samples/boards/96boards/argonkey/microphone/src…
/Zephyr-latest/dts/bindings/dai/
Dintel,dai-dmic.yaml4 description: Intel Digital PDM Microphone (DMIC) node
/Zephyr-latest/soc/intel/intel_adsp/ace/include/
Ddmic_regs.h69 * PDM Primary Channel
87 /* Offset to PDM Secondary Channel */
254 /* Indicates the PDM DMIC clock for the decimator will be sourced from external component instead
255 * of using the PDM DMIC clock generator output
283 /* Periodic synchronous start control of multiple PDM */
/Zephyr-latest/boards/amd/acp_6_0_adsp/doc/
Dindex.rst36 | DMIC(PDM) | on-chip | PDM controller |
/Zephyr-latest/boards/native/nrf_bsim/
Dnrf5340bsim_nrf5340_cpuapp.dts35 /delete-property/ pdm-0;
73 /delete-node/ pdm@26000;
/Zephyr-latest/modules/hal_nordic/nrfx/
DKconfig.logging56 bool "PDM driver logging"
/Zephyr-latest/boards/nxp/rd_rw612_bga/
Drd_rw612_bga.dtsi201 /* Configure pdm channels 0-3 with gain, and cutoff settings
204 * microphone. For best results, read from PDM HW channel 0 as left channel,
205 * and PDM HW channel 1 as right channel.
/Zephyr-latest/samples/shields/x_nucleo_iks02a1/microphone/src/
Dmain.c33 /* requesting a pdm freq around 2MHz */

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