Searched full:nrst (Results 1 – 22 of 22) sorted by relevance
| /Zephyr-Core-3.5.0/dts/bindings/hwinfo/ |
| D | atmel,sam-rstc.yaml | 17 user-nrst:
19 description: Allow user reset on external NRST assert.
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| /Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/ |
| D | Kconfig.saml2x | 85 keeping nRST pin low. When enabling this option, both CS and nRST will
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| /Zephyr-Core-3.5.0/dts/bindings/gpio/ |
| D | arduino-nano-header-r3.yaml | 9 * A 15-pin header with mostly digital signals. The additional NRST (pin3)
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| /Zephyr-Core-3.5.0/drivers/hwinfo/ |
| D | hwinfo_sam_rstc.c | 70 /* Enable/disable user reset on NRST */ in hwinfo_rstc_init()
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| /Zephyr-Core-3.5.0/dts/arm/atmel/ |
| D | samr34.dtsi | 53 reset-gpios = <&portb 15 GPIO_ACTIVE_LOW>; /* nRST */
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| D | sam3x.dtsi | 247 user-nrst;
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| D | sam4s.dtsi | 232 user-nrst;
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| D | sam4e.dtsi | 288 user-nrst;
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| D | same70.dtsi | 444 user-nrst;
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| /Zephyr-Core-3.5.0/boards/shields/inventek_eswifi/doc/ |
| D | index.rst | 49 as is. Some arduino boards don't have NRST pin connected to a GPIO pin. The
50 recommendation is bend the NRST pin and make a wire to D6. WAKE-UP signal is
72 | D6 | NRST | UART/SPI [wiring] |
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| /Zephyr-Core-3.5.0/boards/arm/stm32f401_mini/doc/ |
| D | index.rst | 122 by setting the BOOT0 dip switch position to ON. Reset the board with the NRST button.
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| /Zephyr-Core-3.5.0/boards/arm/mikroe_mini_m4_for_stm32/doc/ |
| D | mikroe_mini_m4_for_stm32.rst | 49 | MCLR(1) | NRST(15) |
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| /Zephyr-Core-3.5.0/boards/arm/blackpill_f401cc/doc/ |
| D | index.rst | 133 by keeping the BOOT0 switch pressed while pressing and releasing the NRST switch.
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| /Zephyr-Core-3.5.0/boards/arm/blackpill_f401ce/doc/ |
| D | index.rst | 138 by keeping the BOOT0 switch pressed while pressing and releasing the NRST switch.
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| /Zephyr-Core-3.5.0/boards/arm/blackpill_f411ce/doc/ |
| D | index.rst | 138 by keeping the BOOT0 switch pressed while pressing and releasing the NRST switch.
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| /Zephyr-Core-3.5.0/boards/riscv/icev_wireless/doc/ |
| D | index.rst | 81 The J3 pins are 4V, 3.3V, NRST, GPIO2, GPIO3, GPIO8, GPIO9, GPIO10, GPIO20,
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| /Zephyr-Core-3.5.0/boards/arm/olimex_stm32_p405/doc/ |
| D | index.rst | 66 * RST = NRST
163 | RST | NRST |
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| /Zephyr-Core-3.5.0/boards/arm/olimexino_stm32/doc/ |
| D | index.rst | 74 * RST = NRST
104 | 10 | RESET | NRST |
198 | 1 | RESET | NRST |
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| /Zephyr-Core-3.5.0/boards/arm/olimex_stm32_h405/doc/ |
| D | index.rst | 75 * RST = NRST
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| /Zephyr-Core-3.5.0/boards/arm/ronoth_lodev/doc/ |
| D | s76s.rst | 107 NRST I/O - - - …
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| /Zephyr-Core-3.5.0/boards/arm/olimex_stm32_h407/doc/ |
| D | index.rst | 66 * RST = NRST
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| /Zephyr-Core-3.5.0/boards/arm/olimex_stm32_e407/doc/ |
| D | index.rst | 70 * RST = NRST
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