1/* 2 * Copyright (c) 2017 Justin Watson 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <arm/armv7-m.dtsi> 8#include <zephyr/dt-bindings/i2c/i2c.h> 9#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 10 11/ { 12 aliases { 13 watchdog0 = &wdt; 14 }; 15 16 chosen { 17 zephyr,flash-controller = &eefc; 18 }; 19 20 cpus { 21 #address-cells = <1>; 22 #size-cells = <0>; 23 24 cpu0: cpu@0 { 25 device_type = "cpu"; 26 compatible = "arm,cortex-m3"; 27 reg = <0>; 28 }; 29 }; 30 31 soc { 32 pmc: pmc@400e0600 { 33 compatible = "atmel,sam-pmc"; 34 reg = <0x400e0600 0x200>; 35 interrupts = <5 0>; 36 #clock-cells = <2>; 37 status = "okay"; 38 }; 39 40 sram0: memory@20070000 { 41 compatible = "mmio-sram"; 42 reg = <0x20070000 0x18000>; 43 }; 44 45 /* Only used for HWINFO device ID */ 46 eefc: flash-controller@400e0a00 { 47 compatible = "atmel,sam-flash-controller"; 48 reg = <0x400e0a00 0x200>; 49 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 50 51 #address-cells = <1>; 52 #size-cells = <1>; 53 54 flash0: flash@80000 { 55 compatible = "soc-nv-flash"; 56 reg = <0x00080000 0x80000>; 57 58 write-block-size = <16>; 59 erase-block-size = <512>; 60 }; 61 62 /* 63 * SAM3X doesn't support erase pages command and must 64 * be keeped disabled. 65 */ 66 status = "disabled"; 67 }; 68 69 wdt: watchdog@400e1a50 { 70 compatible = "atmel,sam-watchdog"; 71 reg = <0x400e1a50 0xc>; 72 interrupts = <4 0>; 73 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 74 status = "disabled"; 75 }; 76 77 twi0: i2c@4008c000 { 78 compatible = "atmel,sam-i2c-twi"; 79 clock-frequency = <I2C_BITRATE_STANDARD>; 80 reg = <0x4008c000 0x128>; 81 interrupts = <22 0>; 82 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; 83 status = "disabled"; 84 #address-cells = <1>; 85 #size-cells = <0>; 86 }; 87 88 twi1: i2c@40090000 { 89 compatible = "atmel,sam-i2c-twi"; 90 clock-frequency = <I2C_BITRATE_STANDARD>; 91 reg = <0x40090000 0x128>; 92 interrupts = <23 0>; 93 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; 94 status = "disabled"; 95 #address-cells = <1>; 96 #size-cells = <0>; 97 }; 98 99 uart: uart@400e0800 { 100 compatible = "atmel,sam-uart"; 101 reg = <0x400e0800 0x124>; 102 interrupts = <8 1>; 103 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 104 status = "disabled"; 105 }; 106 107 usart0: usart@40098000 { 108 compatible = "atmel,sam-usart"; 109 reg = <0x40098000 0x130>; 110 interrupts = <17 0>; 111 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 112 status = "disabled"; 113 }; 114 115 usart1: usart@4009c000 { 116 compatible = "atmel,sam-usart"; 117 reg = <0x4009c000 0x130>; 118 interrupts = <18 0>; 119 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 120 status = "disabled"; 121 }; 122 123 usart2: usart@400a0000 { 124 compatible = "atmel,sam-usart"; 125 reg = <0x400a0000 0x130>; 126 interrupts = <19 0>; 127 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 128 status = "disabled"; 129 }; 130 131 usart3: usart@400a4000 { 132 compatible = "atmel,sam-usart"; 133 reg = <0x400a4000 0x130>; 134 interrupts = <20 0>; 135 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 136 status = "disabled"; 137 }; 138 139 pinctrl: pinctrl@400e0e00 { 140 compatible = "atmel,sam-pinctrl"; 141 #address-cells = <1>; 142 #size-cells = <1>; 143 ranges = <0x400e0e00 0x400e0e00 0xc00>; 144 145 pioa: pio@400e0e00 { 146 compatible = "atmel,sam-gpio"; 147 reg = <0x400e0e00 0x190>; 148 interrupts = <11 1>; 149 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 150 gpio-controller; 151 #gpio-cells = <2>; 152 #atmel,pin-cells = <2>; 153 }; 154 155 piob: pio@400e1000 { 156 compatible = "atmel,sam-gpio"; 157 reg = <0x400e1000 0x190>; 158 interrupts = <12 1>; 159 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 160 gpio-controller; 161 #gpio-cells = <2>; 162 #atmel,pin-cells = <2>; 163 }; 164 165 pioc: pio@400e1200 { 166 compatible = "atmel,sam-gpio"; 167 reg = <0x400e1200 0x190>; 168 interrupts = <13 1>; 169 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 170 gpio-controller; 171 #gpio-cells = <2>; 172 #atmel,pin-cells = <2>; 173 }; 174 175 piod: pio@400e1400 { 176 compatible = "atmel,sam-gpio"; 177 reg = <0x400e1400 0x190>; 178 interrupts = <14 1>; 179 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 180 gpio-controller; 181 #gpio-cells = <2>; 182 #atmel,pin-cells = <2>; 183 }; 184 185 pioe: pio@400e1600 { 186 compatible = "atmel,sam-gpio"; 187 reg = <0x400e1600 0x190>; 188 interrupts = <15 1>; 189 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 190 gpio-controller; 191 #gpio-cells = <2>; 192 #atmel,pin-cells = <2>; 193 }; 194 }; 195 196 tc0: tc@40080000 { 197 compatible = "atmel,sam-tc"; 198 reg = <0x40080000 0x100>; 199 interrupts = <27 0 200 28 0 201 29 0>; 202 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, 203 <&pmc PMC_TYPE_PERIPHERAL 28>, 204 <&pmc PMC_TYPE_PERIPHERAL 29>; 205 status = "disabled"; 206 }; 207 208 tc1: tc@40084000 { 209 compatible = "atmel,sam-tc"; 210 reg = <0x40084000 0x100>; 211 interrupts = <30 0 212 31 0 213 32 0>; 214 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, 215 <&pmc PMC_TYPE_PERIPHERAL 31>, 216 <&pmc PMC_TYPE_PERIPHERAL 32>; 217 status = "disabled"; 218 }; 219 220 tc2: tc@40088000 { 221 compatible = "atmel,sam-tc"; 222 reg = <0x40088000 0x100>; 223 interrupts = <33 0 224 34 0 225 35 0>; 226 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>, 227 <&pmc PMC_TYPE_PERIPHERAL 34>, 228 <&pmc PMC_TYPE_PERIPHERAL 35>; 229 status = "disabled"; 230 }; 231 232 pwm0: pwm@40094000 { 233 compatible = "atmel,sam-pwm"; 234 reg = <0x40094000 0x4000>; 235 interrupts = <36 1>; 236 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>; 237 prescaler = <10>; 238 divider = <1>; 239 #pwm-cells = <3>; 240 status = "disabled"; 241 }; 242 243 rstc: rstc@400e1a00 { 244 compatible = "atmel,sam-rstc"; 245 reg = <0x400e1a00 0x10>; 246 clocks = <&pmc PMC_TYPE_PERIPHERAL 1>; 247 user-nrst; 248 }; 249 }; 250}; 251 252&nvic { 253 arm,num-irq-priority-bits = <4>; 254}; 255
