1/* 2 * Copyright (c) 2017 Justin Watson 3 * Copyright (c) 2019 Gerson Fernando Budke 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8#include <arm/armv7-m.dtsi> 9#include <zephyr/dt-bindings/adc/adc.h> 10#include <zephyr/dt-bindings/i2c/i2c.h> 11#include <zephyr/dt-bindings/gpio/gpio.h> 12#include <zephyr/dt-bindings/pwm/pwm.h> 13#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h> 14 15/ { 16 aliases { 17 watchdog0 = &wdt; 18 }; 19 20 chosen { 21 zephyr,flash-controller = &eefc; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 cpu0: cpu@0 { 29 device_type = "cpu"; 30 compatible = "arm,cortex-m4"; 31 reg = <0>; 32 #address-cells = <1>; 33 #size-cells = <1>; 34 35 mpu: mpu@e000ed90 { 36 compatible = "arm,armv7m-mpu"; 37 reg = <0xe000ed90 0x40>; 38 arm,num-mpu-regions = <8>; 39 }; 40 }; 41 }; 42 43 soc { 44 pmc: pmc@400e0400 { 45 compatible = "atmel,sam-pmc"; 46 reg = <0x400e0400 0x200>; 47 interrupts = <5 0>; 48 #clock-cells = <2>; 49 status = "okay"; 50 }; 51 52 sram0: memory@20100000 { 53 compatible = "mmio-sram"; 54 }; 55 56 eefc: flash-controller@400e0a00 { 57 compatible = "atmel,sam-flash-controller"; 58 reg = <0x400e0a00 0x200>; 59 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; 60 61 #address-cells = <1>; 62 #size-cells = <1>; 63 64 flash0: flash@400000 { 65 compatible = "soc-nv-flash"; 66 67 write-block-size = <16>; 68 erase-block-size = <8192>; 69 }; 70 }; 71 72 wdt: watchdog@400e1450 { 73 compatible = "atmel,sam-watchdog"; 74 reg = <0x400e1450 0xc>; 75 interrupts = <4 0>; 76 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 77 status = "disabled"; 78 }; 79 80 twi0: i2c@40018000 { 81 compatible = "atmel,sam-i2c-twi"; 82 clock-frequency = <I2C_BITRATE_STANDARD>; 83 reg = <0x40018000 0x128>; 84 interrupts = <19 0>; 85 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; 86 status = "disabled"; 87 #address-cells = <1>; 88 #size-cells = <0>; 89 }; 90 91 twi1: i2c@4001c000 { 92 compatible = "atmel,sam-i2c-twi"; 93 clock-frequency = <I2C_BITRATE_STANDARD>; 94 reg = <0x4001c000 0x128>; 95 interrupts = <20 0>; 96 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 97 status = "disabled"; 98 #address-cells = <1>; 99 #size-cells = <0>; 100 }; 101 102 spi0: spi@40008000 { 103 compatible = "atmel,sam-spi"; 104 #address-cells = <1>; 105 #size-cells = <0>; 106 reg = <0x40008000 0x4000>; 107 interrupts = <21 0>; 108 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; 109 status = "disabled"; 110 }; 111 112 uart0: uart@400e0600 { 113 compatible = "atmel,sam-uart"; 114 reg = <0x400e0600 0x200>; 115 interrupts = <8 1>; 116 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 117 status = "disabled"; 118 }; 119 120 uart1: uart@400e0800 { 121 compatible = "atmel,sam-uart"; 122 reg = <0x400e0800 0x200>; 123 interrupts = <9 1>; 124 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 125 status = "disabled"; 126 }; 127 128 pwm0: pwm@40020000 { 129 compatible = "atmel,sam-pwm"; 130 reg = <0x40020000 0x4000>; 131 interrupts = <31 1>; 132 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>; 133 prescaler = <10>; 134 divider = <1>; 135 #pwm-cells = <3>; 136 status = "disabled"; 137 }; 138 139 usart0: usart@40024000 { 140 compatible = "atmel,sam-usart"; 141 reg = <0x40024000 0x130>; 142 interrupts = <14 1>; 143 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 144 status = "disabled"; 145 }; 146 147 usart1: usart@40028000 { 148 compatible = "atmel,sam-usart"; 149 reg = <0x40028000 0x130>; 150 interrupts = <15 1>; 151 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 152 status = "disabled"; 153 }; 154 155 pinctrl: pinctrl@400e0e00 { 156 compatible = "atmel,sam-pinctrl"; 157 #address-cells = <1>; 158 #size-cells = <1>; 159 ranges = <0x400e0e00 0x400e0e00 0x600>; 160 status = "okay"; 161 162 pioa: gpio@400e0e00 { 163 compatible = "atmel,sam-gpio"; 164 reg = <0x400e0e00 0x190>; 165 interrupts = <11 1>; 166 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 167 gpio-controller; 168 #gpio-cells = <2>; 169 #atmel,pin-cells = <2>; 170 }; 171 172 piob: gpio@400e1000 { 173 compatible = "atmel,sam-gpio"; 174 reg = <0x400e1000 0x190>; 175 interrupts = <12 1>; 176 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 177 gpio-controller; 178 #gpio-cells = <2>; 179 #atmel,pin-cells = <2>; 180 }; 181 182 pioc: gpio@400e1200 { 183 compatible = "atmel,sam-gpio"; 184 reg = <0x400e1200 0x190>; 185 interrupts = <13 1>; 186 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 187 gpio-controller; 188 #gpio-cells = <2>; 189 #atmel,pin-cells = <2>; 190 }; 191 }; 192 193 tc0: tc@40010000 { 194 compatible = "atmel,sam-tc"; 195 reg = <0x40010000 0x100>; 196 interrupts = <23 0 197 24 0 198 25 0>; 199 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, 200 <&pmc PMC_TYPE_PERIPHERAL 24>, 201 <&pmc PMC_TYPE_PERIPHERAL 25>; 202 status = "disabled"; 203 }; 204 205 tc1: tc@40014000 { 206 compatible = "atmel,sam-tc"; 207 reg = <0x40014000 0x100>; 208 interrupts = <26 0 209 27 0 210 28 0>; 211 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, 212 <&pmc PMC_TYPE_PERIPHERAL 27>, 213 <&pmc PMC_TYPE_PERIPHERAL 28>; 214 status = "disabled"; 215 }; 216 217 adc0: adc@40038000 { 218 compatible = "atmel,sam-adc"; 219 reg = <0x40038000 0x4000>; 220 interrupts = <29 1>; 221 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; 222 #address-cells = <1>; 223 #size-cells = <0>; 224 #io-channel-cells = <1>; 225 status = "disabled"; 226 }; 227 228 rstc: rstc@400e1400 { 229 compatible = "atmel,sam-rstc"; 230 reg = <0x400e1400 0x10>; 231 clocks = <&pmc PMC_TYPE_PERIPHERAL 1>; 232 user-nrst; 233 }; 234 235 smc: smc@400e0000 { 236 compatible = "atmel,sam-smc"; 237 #address-cells = <1>; 238 #size-cells = <0>; 239 reg = <0x400e0000 0x200>; 240 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 241 status = "disabled"; 242 }; 243 }; 244}; 245 246&nvic { 247 arm,num-irq-priority-bits = <4>; 248}; 249
