Searched +full:nor +full:- +full:flash (Results 1 – 25 of 326) sorted by relevance
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| /Zephyr-latest/samples/drivers/spi_flash/ |
| D | README.rst | 1 .. zephyr:code-sample:: spi-nor
2 :name: JEDEC SPI-NOR flash
3 :relevant-api: flash_interface
5 Use the flash API to interact with an SPI NOR serial flash memory device.
10 This sample demonstrates using the :ref:`flash API <flash_api>` on a SPI NOR serial flash
12 allows confirmation that the flash is working and that automatic power
21 * :dtcompatible:`jedec,spi-nor`,
22 * :dtcompatible:`st,stm32-qspi-nor`,
23 * :dtcompatible:`st,stm32-ospi-nor`,
24 * :dtcompatible:`nordic,qspi-nor`.
[all …]
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| D | sample.yaml | 2 name: SPI Flash Sample
4 sample.drivers.spi.flash:
6 - spi
7 - flash
8 filter: dt_compat_enabled("jedec,spi-nor") or dt_compat_enabled("st,stm32-qspi-nor")
9 or dt_compat_enabled("st,stm32-ospi-nor") or dt_compat_enabled("st,stm32-xspi-nor")
10 or (dt_compat_enabled("nordic,qspi-nor") and CONFIG_NORDIC_QSPI_NOR)
12 - hifive_unmatched/fu740/s7
13 - hifive_unmatched/fu740/u74
19 - "Test 1: Flash erase"
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| /Zephyr-latest/dts/bindings/memory-controllers/ |
| D | st,stm32-fmc-nor-psram.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 STM32 Flexible Memory Controller (NOR Flash/PSRAM/SRAM controller).
11 - 8 bits
12 - 16 bits
13 - 32 bits
15 - Asynchronous mode
16 - Burst mode for synchronous accesses with configurable option to split burst
18 - Multiplexed or non-multiplexed
19 * NOR Flash memory
20 - Asynchronous mode
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| /Zephyr-latest/dts/bindings/flash_controller/ |
| D | nuvoton,npcx-fiu-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 The SPI NOR flash devices accessed by Nuvoton Flash Interface Unit (FIU).
7 Representation of a SPI NOR flash on a qspi bus looks like:
10 compatible ="nuvoton,npcx-fiu-nor";
14 qspi-flags = <NPCX_QSPI_SW_CS1>;
15 mapped-addr = <0x64000000>;
16 pinctrl-0 = <&int_flash_sl>;
17 pinctrl-names = "default";
20 compatible: "nuvoton,npcx-fiu-nor"
22 include: [flash-controller.yaml, pinctrl-device.yaml, "jedec,spi-nor-common.yaml"]
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| D | cdns,qspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: Cadence Quad-SPI NOR flash controller
6 compatible: "cdns,qspi-nor"
8 include: flash-controller.yaml
11 clock-frequency:
14 description: clock frequency information for Cadence QSPI NOR Flash
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| D | st,stm32-xspi-nor.yaml | 1 # Copyright (c) 2021 - 2024 STMicroelectronics
2 # SPDX-License-Identifier: Apache-2.0
5 STM32 XSPI Flash controller supporting the JEDEC CFI interface
7 Representation of a serial flash on a xspi bus:
9 mx25lm51245: xspi-nor-flash@70000000 {
10 compatible = "st,stm32-xspi-nor";
12 data-mode = <XSPI_OCTO_MODE>; /* access on 8 data lines */
13 data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-xspi-nor"
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| D | st,stm32-qspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 STM32 QSPI Flash controller supporting the JEDEC CFI interface
7 Representation of a serial flash on a quadspi bus:
9 mx25r6435f: qspi-nor-flash@90000000 {
10 compatible = "st,stm32-qspi-nor";
12 qspi-max-frequency = <80000000>;
13 reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
14 reset-gpios-duration = <1>;
15 spi-bus-width = <4>;
19 compatible: "st,stm32-qspi-nor"
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| D | st,stm32-ospi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
5 STM32 OSPI Flash controller supporting the JEDEC CFI interface
7 Representation of a serial flash on a octospi bus:
9 mx25lm51245: ospi-nor-flash@70000000 {
10 compatible = "st,stm32-ospi-nor";
12 data-mode = <OSPI_OPI_MODE>; /* access on 8 data lines */
13 data-rate = <OSPI_DTR_TRANSFER>; /* access in DTR */
14 ospi-max-frequency = <DT_FREQ_M(50)>;
18 compatible: "st,stm32-ospi-nor"
20 include: ["flash-controller.yaml", "jedec,jesd216.yaml"]
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| /Zephyr-latest/drivers/flash/ |
| D | Kconfig.npcx_fiu | 1 # NPCX Flash driver configuration options
4 # SPDX-License-Identifier: Apache-2.0
7 bool "Nuvoton NPCX QSPI Bus Flash driver"
12 This option enables the QSPI Bus Flash driver for NPCX family of
16 bool "Nuvoton NPCX embedded controller (EC) QSPI NOR Flash driver"
26 This option enables the QSPI NOR Flash driver for NPCX family of
32 bool "QSPI NOR flash feature during driver initialization"
36 This option enables the QSPI NOR Flash features such as Quad-Enable,
37 4-byte address support and so on during driver initialization. Disable
38 it if QSPI NOR devices are not ready during driver initialization.
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| D | Kconfig.nordic_qspi_nor | 2 # SPDX-License-Identifier: Apache-2.0
5 bool "QSPI NOR Flash"
34 int "Size of a stack-based buffer to handle writes not supported by QSPI"
38 from a word-aligned location in RAM. A non-zero value here enables
49 Enable setting up the QSPI NOR driver to allow for execution of code
51 the QSPI NOR init priority must be set so that no XIP code in the
52 QSPI NOR flash chip is executed until the driver has been setup.
53 This will also disable power management for the QSPI NOR flash chip.
61 a flash sector erase. The 500 ms default allows for
62 most typical NOR flash chips to erase a sector.
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| D | Kconfig.nxp_s32 | 2 # SPDX-License-Identifier: Apache-2.0
5 bool "NXP S32 QSPI NOR driver"
14 Enable the Flash driver for a NOR Serial Flash Memory device connected
20 bool "Read flash parameters at runtime"
22 Read flash device characteristics from the device at runtime.
24 JESD216-compatible devices, with the following notes:
25 - Quad Enable Requirements bitfield (DW15) must be present in the SFDP
28 - Soft Reset bitfield (DW16) must be present in the SFDP tables to
30 - 0-X-X mode discovery not yet implemented by the HAL.
34 device size and jedec-id properties must be set in devicetree node.
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| D | Kconfig.mcux | 1 # SPDX-License-Identifier: Apache-2.0
4 bool "MCUX flash shim driver"
17 Enables the MCUX flash shim driver.
19 the duration of the flash erase/write operations. This will
20 have an impact on the overall system performance - whether
29 Do a margin check flash command before reading an area.
43 menu "Flexspi flash driver"
46 bool "MCUX FlexSPI NOR driver"
84 Select the MX25UM51345G octal flash operation mode(Octal I/O STR
98 bool "MCUX FlexSPI NOR write RAM buffer"
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| /Zephyr-latest/include/zephyr/drivers/flash/ |
| D | npcx_flash_api_ex.h | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/drivers/flash.h>
22 * configuration such as status registers of nor flash, power on/off,
27 * NPCX Configure specific operation for Quad-SPI nor flash.
29 * It configures specific operation for Quad-SPI nor flash such as lock
30 * or unlock UMA mode, set write protection pin of internal flash, and
35 * NPCX Get specific operation for Quad-SPI nor flash.
37 * It returns current specific operation for Quad-SPI nor flash.
69 #define NPCX_EX_OP_INT_FLASH_WP BIT(1) /* Issue write protection of internal flash */
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| /Zephyr-latest/samples/drivers/mspi/mspi_flash/ |
| D | README.rst | 1 .. zephyr:code-sample:: mspi-flash
2 :name: JEDEC MSPI-NOR flash
3 :relevant-api: flash_interface
5 Use the flash API to interact with a MSPI NOR serial flash memory device.
10 This sample demonstrates using the :ref:`flash API <flash_api>` on a MSPI NOR serial flash
12 allows confirmation that the flash is working and that automatic power
18 The application will build only for a target that has a :ref:`devicetree <dt-guide>`
21 * :dtcompatible:`ambiq,mspi-device`, :dtcompatible:`mspi-atxp032`
23 .. zephyr-app-commands::
24 :zephyr-app: samples/drivers/mspi/mspi_flash
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| /Zephyr-latest/dts/bindings/mtd/ |
| D | andestech,qspi-nor.yaml | 4 # SPDX-License-Identifier: Apache-2.0
7 compatible: "andestech,qspi-nor"
10 Properties supporting Zephyr qspi-nor flash driver control of
11 flash memories using the standard M25P80-based command set.
13 include: "jedec,spi-nor-common.yaml"
16 wp-gpios:
17 type: phandle-array
20 hold-gpios:
21 type: phandle-array
24 reset-gpios:
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| D | jedec,spi-nor.yaml | 3 # SPDX-License-Identifier: Apache-2.0
6 Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI
7 API) control of serial flash memories using the standard M25P80-based
10 compatible: "jedec,spi-nor"
12 include: [spi-device.yaml, "jedec,spi-nor-common.yaml"]
15 wp-gpios:
16 type: phandle-array
18 hold-gpios:
19 type: phandle-array
21 reset-gpios:
[all …]
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| D | nxp,imx-flexspi-nor.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP FlexSPI NOR
6 compatible: "nxp,imx-flexspi-nor"
8 include: ["nxp,imx-flexspi-device.yaml", soc-nv-flash.yaml]
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| /Zephyr-latest/dts/arm/nuvoton/ |
| D | npcx4m3f.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10088000 {
15 flash1: flash@60000000 {
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x25>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS0>;
40 mapped-addr = <0x60000000>;
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| D | npcx4m8f.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10060000 {
15 flash1: flash@60000000 {
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x23>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS0>;
40 mapped-addr = <0x60000000>;
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| D | npcx9m3f.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10080000 {
15 flash1: flash@64000000 {
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x25>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS1>;
40 mapped-addr = <0x64000000>;
[all …]
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| D | npcx9m6f.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10090000 {
15 flash1: flash@64000000 {
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x21>;
33 compatible ="nuvoton,npcx-fiu-nor";
38 /* quad spi bus configuration of nor flash device */
39 qspi-flags = <NPCX_QSPI_SW_CS1>;
40 mapped-addr = <0x64000000>;
[all …]
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| D | npcx9m7f.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10070000 {
15 flash1: flash@64000000 {
20 compatible = "mmio-sram";
24 soc-id {
25 device-id = <0x22>;
31 compatible ="nuvoton,npcx-fiu-nor";
36 /* quad spi bus configuration of nor flash device */
37 qspi-flags = <NPCX_QSPI_SW_CS1>;
38 mapped-addr = <0x64000000>;
[all …]
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| D | npcx7m7fc.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
11 flash0: flash@10070000 {
14 * because the internal flash size is 512 KB.
19 flash1: flash@64000000 {
24 compatible = "mmio-sram";
30 compatible = "mmio-sram";
34 soc-id {
35 device-id = <0x20>;
43 compatible ="nuvoton,npcx-fiu-nor";
48 /* quad spi bus configuration of nor flash device */
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| /Zephyr-latest/boards/microchip/mpfs_icicle/ |
| D | mpfs_icicle_common.dtsi | 2 * Copyright (c) 2020-2021 Microchip Technology Inc
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "microchip,mpfs-icicle-kit";
14 compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
23 compatible = "gpio-leds";
32 compatible = "gpio-keys";
43 current-speed = <115200>;
44 clock-frequency = <150000000>;
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| /Zephyr-latest/samples/drivers/jesd216/ |
| D | sample.yaml | 5 - spi
6 - flash
12 - "sfdp-bfp ="
13 - "jedec-id ="
17 - hifive1
18 - hifive_unleashed/fu540/e51
19 - hifive_unleashed/fu540/u54
20 - hifive_unmatched/fu740/s7
21 - hifive_unmatched/fu740/u74
22 - mimxrt1170_evk/mimxrt1176/cm7
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