Searched full:neorv32 (Results 1 – 25 of 32) sorted by relevance
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| /Zephyr-latest/boards/others/neorv32/doc/ |
| D | index.rst | 1 .. zephyr:board:: neorv32
6 The NEORV32 is an open-source RISC-V compatible processor system intended as a
10 For more information about the NEORV32, see the following websites:
12 - `The NEORV32 RISC-V Processor GitHub`_
13 - `The NEORV32 RISC-V Processor Datasheet`_
14 - `The NEORV32 RISC-V Processor User Guide`_
16 The currently supported version is NEORV32 v1.11.2.
21 The ``neorv32`` board target can be used a generic definition for NEORV32
22 based boards. Customization to fit custom NEORV32 implementations can be done
30 The default board configuration reads the system clock frequency from the NEORV32 SYSINFO module,
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| /Zephyr-latest/boards/others/neorv32/ |
| D | CMakeLists.txt | 5 # Generate NEORV32 image formats for initialising IMEM.
17 …message(STATUS "neorv32 binary will be written to: ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}…
27 …message(STATUS "neorv32 VHDL will be written to: ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.v…
29 …message(STATUS "The neorv32 image_gen utility was not found, neorv32 image files cannot be generat…
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| D | board.yml | 2 name: neorv32
3 full_name: NEORV32
6 - name: neorv32
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| D | neorv32.yaml | 1 identifier: neorv32
2 name: NEORV32 Processor (SoC)
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| D | neorv32.dts | 9 #include <neorv32.dtsi>
13 model = "NEORV32";
14 compatible = "neorv32";
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| /Zephyr-latest/dts/bindings/rng/ |
| D | neorv32,trng.yaml | 1 description: NEORV32 True Random Number Generator (TRNG)
3 compatible: "neorv32,trng"
15 phandle to syscon (NEORV32 SYSINFO) node.
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| /Zephyr-latest/drivers/gpio/ |
| D | Kconfig.neorv32 | 1 # NEORV32 GPIO configuration options
7 bool "NEORV32 GPIO driver"
12 Enable NEORV32 GPIO driver.
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.neorv32 | 1 # NEORV32 UART configuration
7 bool "NEORV32 UART"
14 This option enables the UART driver for the NEORV32.
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| D | uart_neorv32.c | 22 /* NEORV32 UART registers offsets */
26 /* NEORV32 UART CTRL register bits */
48 /* NEORV32 UART DATA register bits */
414 LOG_ERR("neorv32 uart instance not supported"); in neorv32_uart_init()
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| D | Kconfig | 196 rsource "Kconfig.neorv32"
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| /Zephyr-latest/soc/neorv32/ |
| D | Kconfig | 18 The targeted NEORV32 version as BCD-coded number. The format is
19 identical to that of the NEORV32 Machine implementation ID (mimpid)
23 bool "Read the NEORV32 clock frequency at runtime"
30 If enabled, the NEORV32 clock frequency will be read from SYSINFO during boot. This
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| D | Kconfig.soc | 7 NEORV32 Processor (SoC).
9 The NEORV32 CPU implementation must have the following RISC-V ISA
16 default "neorv32" if SOC_NEORV32
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| D | soc.yml | 2 - name: neorv32
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| /Zephyr-latest/dts/bindings/serial/ |
| D | neorv32,uart.yaml | 1 description: NEORV32 UART
3 compatible: "neorv32,uart"
24 phandle to syscon (NEORV32 SYSINFO) node.
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| /Zephyr-latest/drivers/entropy/ |
| D | Kconfig.neorv32 | 1 # NEORV32 TRNG configuration
7 bool "NEORV32 TRNG"
14 the NEORV32.
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| D | Kconfig | 38 source "drivers/entropy/Kconfig.neorv32"
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| D | entropy_neorv32_trng.c | 119 LOG_ERR("neorv32 trng not supported"); in neorv32_trng_init()
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | neorv32,gpio.yaml | 1 description: NEORV32 GPIO
3 compatible: "neorv32,gpio"
15 phandle to syscon (NEORV32 SYSINFO) node.
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| /Zephyr-latest/dts/riscv/ |
| D | neorv32.dtsi | 22 compatible = "neorv32,cpu", "riscv";
77 compatible = "neorv32,bootrom", "mmio-sram";
83 compatible = "neorv32,clint", "sifive,clint0";
98 compatible = "neorv32,uart";
107 compatible = "neorv32,uart";
116 compatible = "neorv32,trng";
123 compatible = "neorv32,gpio";
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| /Zephyr-latest/dts/bindings/cpu/ |
| D | neorv32,cpu.yaml | 4 description: NEORV32 RISC-V CPU
6 compatible: "neorv32,cpu"
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| /Zephyr-latest/tests/drivers/gpio/gpio_get_direction/ |
| D | testcase.yaml | 11 - neorv32
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| /Zephyr-latest/boards/others/neorv32/support/ |
| D | openocd.cfg | 15 source [find neorv32.cfg]
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| D | neorv32.cfg | 7 set _CHIPNAME neorv32
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| /Zephyr-latest/tests/drivers/gpio/gpio_api_1pin/ |
| D | testcase.yaml | 19 - neorv32
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| /Zephyr-latest/doc/hardware/arch/ |
| D | risc-v.rst | 9 and support for some FPGA implementations such as neorv32 and
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