/Zephyr-latest/samples/drivers/crypto/ |
D | sample.yaml | 20 - ".*: CBC Mode" 21 - ".*: CTR Mode" 22 - ".*: CCM Mode" 23 - ".*: GCM Mode" 34 - ".*: CBC Mode" 35 - ".*: CTR Mode" 36 - ".*: CCM Mode" 37 - ".*: GCM Mode" 48 - ".*: ECB mode ENCRYPT - Match" 49 - ".*: ECB mode DECRYPT - Match" [all …]
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D | README.rst | 31 [general] [INF] cbc_mode: CBC Mode 33 [general] [INF] cbc_mode: cbc mode ENCRYPT - Match 35 [general] [INF] cbc_mode: cbc mode DECRYPT - Match 37 [general] [INF] ctr_mode: CTR Mode 39 [general] [INF] ctr_mode: ctr mode ENCRYPT - Match 41 [general] [INF] ctr_mode: ctr mode DECRYPT - Match 43 [general] [INF] ccm_mode: CCM Mode 45 [general] [INF] ccm_mode: CCM mode ENCRYPT - Match 47 [general] [INF] ccm_mode: CCM mode DECRYPT - Match
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/Zephyr-latest/dts/bindings/memory-controllers/ |
D | renesas,smartbond-nor-psram.yaml | 69 Command to enter the QPI mode supported by a memory device 70 (should be transmitted in single bus mode). 75 Command to exit the QPI mode supported by a memory device 76 (should be transmitted in quad bus mode). 78 enter-qpi-mode: 81 If present, the memory device will enter the QPI mode which typically reflects that 82 all bytes be sent in quad bus mode. It's a pre-requisite that read and write 83 commands, that should be read-cmd and write-cmd respectively, reflect the QPI mode. 89 Read command for single/burst read accesses in auto mode. Default value is the opcode 90 for single mode which is supported by all memory devices. [all …]
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/Zephyr-latest/samples/boards/nordic/nrf_sys_event/src/ |
D | main.c | 12 printf("request global constant latency mode\n"); in main() 14 printf("failed to request global constant latency mode\n"); in main() 17 printf("constant latency mode enabled\n"); in main() 19 printf("request global constant latency mode again\n"); in main() 21 printf("failed to request global constant latency mode\n"); in main() 25 printf("release global constant latency mode\n"); in main() 26 printf("constant latency mode will remain enabled\n"); in main() 28 printf("failed to release global constant latency mode\n"); in main() 32 printf("release global constant latency mode again\n"); in main() 33 printf("constant latency mode will be disabled\n"); in main() [all …]
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/Zephyr-latest/samples/boards/st/power_mgmt/standby_shutdown/ |
D | README.rst | 2 :name: Standby/Shutdown mode 5 Enter and exit Standby/Shutdown mode on STM32. 10 This sample is a minimum application to demonstrate basic power management of Standby mode and 11 shutdown mode 12 behavior in a basic blinking LED set up you can enter in shutdown mode or in standbymode mode. 14 when LED2 is OFF to enter to Shutdown Mode 15 when LED2 is ON to enter to Standby Mode 16 release the user button to exit from shutdown mode or from shutdown mode. 41 when LED2 is OFF to enter to Shutdown Mode 42 when LED2 is ON to enter to Standby Mode [all …]
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/Zephyr-latest/include/zephyr/dt-bindings/sensor/ |
D | lis2ds12.h | 17 #define LIS2DS12_DT_ODR_1Hz_LP 1 /* available in LP mode only */ 18 #define LIS2DS12_DT_ODR_12Hz5 2 /* available in LP and HR mode */ 19 #define LIS2DS12_DT_ODR_25Hz 3 /* available in LP and HR mode */ 20 #define LIS2DS12_DT_ODR_50Hz 4 /* available in LP and HR mode */ 21 #define LIS2DS12_DT_ODR_100Hz 5 /* available in LP and HR mode */ 22 #define LIS2DS12_DT_ODR_200Hz 6 /* available in LP and HR mode */ 23 #define LIS2DS12_DT_ODR_400Hz 7 /* available in LP and HR mode */ 24 #define LIS2DS12_DT_ODR_800Hz 8 /* available in LP and HR mode */ 25 #define LIS2DS12_DT_ODR_1600Hz 9 /* available in HF mode only */ 26 #define LIS2DS12_DT_ODR_3200Hz_HF 10 /* available in HF mode only */ [all …]
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D | lis2dux12.h | 11 /* Operating Mode */ 19 #define LIS2DUX12_DT_ODR_1Hz_ULP 1 /* available in ultra-low power mode */ 20 #define LIS2DUX12_DT_ODR_3Hz_ULP 2 /* available in ultra-low power mode */ 21 #define LIS2DUX12_DT_ODR_25Hz_ULP 3 /* available in ultra-low power mode */ 22 #define LIS2DUX12_DT_ODR_6Hz 4 /* available in LP and HP mode */ 23 #define LIS2DUX12_DT_ODR_12Hz5 5 /* available in LP and HP mode */ 24 #define LIS2DUX12_DT_ODR_25Hz 6 /* available in LP and HP mode */ 25 #define LIS2DUX12_DT_ODR_50Hz 7 /* available in LP and HP mode */ 26 #define LIS2DUX12_DT_ODR_100Hz 8 /* available in LP and HP mode */ 27 #define LIS2DUX12_DT_ODR_200Hz 9 /* available in LP and HP mode */ [all …]
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/Zephyr-latest/drivers/sdhc/ |
D | Kconfig.intel | 17 bool "EMMC host controller interrupt mode" 20 EMMC host controller interrupt mode support. 23 bool "EMMC host controller DMA mode" 26 EMMC host controller DMA mode support. 29 bool "EMMC host controller ADMA mode" 32 EMMC host controller ADMA mode support. 42 bool "auto stop command mode" 45 Auto stop command mode support. 48 bool "Block gap mode" 51 Block gap mode support.
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/Zephyr-latest/doc/connectivity/networking/api/ |
D | promiscuous.rst | 3 Promiscuous Mode 13 Promiscuous mode is a mode for a network interface controller that 16 to receive. This mode is normally used for packet sniffing as used 19 `Wikipedia article on promiscuous mode 22 The network promiscuous APIs are used to enable and disable this mode, 24 technologies or network device drivers support promiscuous mode. 29 First the promiscuous mode needs to be turned ON by the application like this: 36 printf("Promiscuous mode already enabled\n"); 38 printf("Cannot enable promiscuous mode for " 58 Finally the promiscuous mode can be turned OFF by the application like this: [all …]
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/Zephyr-latest/drivers/flash/ |
D | Kconfig.cadence_nand | 26 prompt "Set the NAND Operating mode" 29 Specify the Operating mode used by the driver. 32 bool "Cadence Nand CDMA Operating Mode" 35 bool "Cadence Nand PIO Operating Mode" 38 bool "Cadence Nand Generic Operating Mode" 43 int "Set the page count for a single transfer in the CDMA Mode" 46 Configure the page count for a single transfer in the CDMA Mode 49 int "Set the block count for a single transfer in the CDMA Mode" 52 Configure the block count for a single transfer in the CDMA Mode
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/Zephyr-latest/dts/bindings/sensor/ |
D | st,stm32-qdec.yaml | 19 st,encoder-mode: 22 Set encoder mode. 24 0x1: Encoder mode 1 (Default) 25 0x2: Encoder mode 2 26 0x3: Encoder mode 3 28 0x10002: Encoder mode: Clock plus direction, x2 mode 29 0x10003: Encoder mode: Clock plus direction, x1 mode 30 0x10004: Encoder mode: Directional Clock, x2 mode 31 0x10005: Encoder mode: Directional Clock, x1 mode 32 0x10006: Quadrature encoder mode: x1 mode, counting on tim_ti1fp1 [all …]
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D | vishay,veml7700.yaml | 13 psm-mode: 17 Power saving mode as described in the datasheet on page 8. 19 (power saving mode is disabled) which is the default value. 21 0x00 = Disable power saving mode 22 0x01 = Mode 1 (0001b) 23 0x03 = Mode 2 (0011b) 24 0x05 = Mode 3 (0101b) 25 0x07 = Mode 4 (0111b)
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nxp,lpc-iocon-pinctrl.yaml | 86 0 SLEW_0- standard mode, output slew rate is slower 87 1 SLEW_1- fast mode, output slew rate is faster 92 nxp,analog-mode: 95 Set the pin to analog mode. Sets DIGIMODE=0, and ASW=1. Only valid for 97 nxp,analog-alt-mode: 100 Select the pin's alternate analog mode. Valid on LPC55s3x family SOCs 108 Pin output power source. Only valid for I2C mode pins running in I2C 109 mode. 120 I2C glitch filter speed. Only valid for I2C mode pins. Fast mode 128 I2C speed. Only valid for I2C mode pins. Fast mode should be used for [all …]
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/Zephyr-latest/boards/renesas/da1469x_dk_pro/dts/ |
D | da1469x_dk_pro_psram.overlay | 17 /* QSPIC settings for the APS6404L-3SQR QSPI PSRAM memory in QPI mode. */ 28 enter-qpi-mode; 35 rx-inst-mode = "quad-spi"; 36 rx-addr-mode = "quad-spi"; 37 rx-data-mode = "quad-spi"; 38 rx-dummy-mode = "quad-spi"; 39 rx-extra-mode = "quad-spi"; 40 tx-inst-mode = "quad-spi"; 41 tx-addr-mode = "quad-spi"; 42 tx-data-mode = "quad-spi";
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/Zephyr-latest/dts/bindings/regulator/ |
D | silabs,series2-dcdc.yaml | 15 Enable bypass mode. If combined with `regulator-boot-on`, the DC-DC converter 16 is initialized to bypass mode. 17 `regulator-initial-mode` 18 DCDC operating mode. One of `SILABS_DCDC_MODE_BUCK` or `SILABS_DCDC_MODE_BOOST`. 20 Output voltage for boost mode. Not used in buck mode. 30 - regulator-initial-mode 37 regulator-initial-mode: 52 description: Peak current draw in PFMX mode (CCM, continuous conduction mode).
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/Zephyr-latest/include/zephyr/retention/ |
D | bootmode.h | 9 * @brief Public API for boot mode interface 26 * @brief Boot mode interface 27 * @defgroup boot_mode_interface Boot mode interface 36 /** Bootloader boot mode (e.g. serial recovery for MCUboot) */ 41 * @brief Checks if the boot mode of the device is set to a specific value. 43 * @param boot_mode Expected boot mode to check. 45 * @retval 1 If successful and boot mode matches. 46 * @retval 0 If boot mode does not match. 52 * @brief Sets boot mode of device. 54 * @param boot_mode Boot mode value to set. [all …]
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/Zephyr-latest/tests/drivers/build_all/comparator/mcux_acmp/ |
D | mimxrt1176_mux_dac.dts | 32 offset-mode = "LEVEL0"; 33 hysteresis-mode = "LEVEL0"; 34 enable-high-speed-mode; 40 discrete-mode-enable-positive-channel; 41 discrete-mode-enable-resistor-divider; 42 discrete-mode-clock-source = "FAST"; 43 discrete-mode-sample-time = "T1"; 44 discrete-mode-phase1-time = "ALT4"; 45 discrete-mode-phase2-time = "ALT7";
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/Zephyr-latest/dts/bindings/counter/ |
D | nxp,lptmr.yaml | 28 In time counter mode, this field selects the input clock to the prescaler. 29 In pulse counter mode, this field selects the input clock to the glitch filter. 36 When LPTMR is in Pulse mode, this value 43 When LPTMR is in Pulse mode, this value 56 When in prescaler mode, the counter is incremented every 58 When in pulse mode, the counter is incremented every 61 Note, that the pulse mode cannot be 2 ^ 16. 63 timer-mode-sel: 69 for Time-Counter mode or for Pulse mode. 70 0 <- LPTMR is configured for Time Counter Mode. [all …]
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/Zephyr-latest/scripts/ |
D | coccicheck | 20 -m= , --mode= specify the mode use {report, patch, org, context, chain} 31 mode = report 43 -m=*|--mode=*) 44 MODE="${i#*=}" 108 if [ "$MODE" = "" ] ; then 109 echo 'You have not explicitly specified the mode to use. Using default "report" mode.' 111 echo 'You can specify the mode with "./scripts/coccicheck --mode=<mode>"' 113 MODE="report" 116 if [ "$MODE" = "chain" ] ; then 117 echo 'You have selected the "chain" mode.' [all …]
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/Zephyr-latest/drivers/sensor/ams/ens210/ |
D | Kconfig | 16 prompt "Temperature measurement mode" 19 Enable/disable temperature measurements and set measurement mode. 23 bool "Temperature measurements in single shot mode" 25 bool "Temperature measurements in continuous mode" 29 prompt "Humidity measurement mode" 32 Enable/disable relative humidity measurements and set measurement mode. 36 bool "Relative humidity measurements in single shot mode" 38 bool "Relative humidity measurements in continuous mode"
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/Zephyr-latest/boards/digilent/arty_a7/ |
D | board.h | 11 /* eXecute-In-Place mode */ 13 /* Normal mode */ 18 * @brief Select the mode of the DAPlink QSPI multiplexer. 20 * Note: The multiplexer mode must not be changed while executing code from the 21 * off-board QSPI flash in XIP mode. 23 * @param mode The multiplexer mode to be selected. 27 int board_daplink_qspi_mux_select(enum board_daplink_qspi_mux_mode mode);
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/Zephyr-latest/drivers/pinctrl/ |
D | pinctrl_gecko.c | 41 rxpin.mode = gpioModeInput; in pinctrl_configure_pins() 43 GPIO_PinModeSet(rxpin.port, rxpin.pin, rxpin.mode, in pinctrl_configure_pins() 50 txpin.mode = gpioModePushPull; in pinctrl_configure_pins() 52 GPIO_PinModeSet(txpin.port, txpin.pin, txpin.mode, in pinctrl_configure_pins() 58 pin_config.mode = gpioModePushPull; in pinctrl_configure_pins() 60 GPIO_PinModeSet(pin_config.port, pin_config.pin, pin_config.mode, in pinctrl_configure_pins() 65 pin_config.mode = gpioModeInput; in pinctrl_configure_pins() 67 GPIO_PinModeSet(pin_config.port, pin_config.pin, pin_config.mode, in pinctrl_configure_pins() 124 config->pin_rts.mode, in pinctrl_configure_pins() 128 config->pin_cts.mode, in pinctrl_configure_pins() [all …]
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/Zephyr-latest/drivers/regulator/ |
D | regulator_npm1100.c | 21 struct gpio_dt_spec mode; member 29 regulator_mode_t mode) in regulator_npm1100_set_mode() argument 33 if ((config->mode.port == NULL) || (mode > NPM1100_MODE_PWM)) { in regulator_npm1100_set_mode() 37 return gpio_pin_set_dt(&config->mode, in regulator_npm1100_set_mode() 38 mode == NPM1100_MODE_AUTO ? 0 : 1); in regulator_npm1100_set_mode() 42 regulator_mode_t *mode) in regulator_npm1100_get_mode() argument 47 if (config->mode.port == NULL) { in regulator_npm1100_get_mode() 51 ret = gpio_pin_get_dt(&config->mode); in regulator_npm1100_get_mode() 56 *mode = (ret == 0) ? NPM1100_MODE_AUTO : NPM1100_MODE_PWM; in regulator_npm1100_get_mode() 66 if (config->mode.port != NULL) { in regulator_npm1100_init() [all …]
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/Zephyr-latest/samples/net/wifi/apsta_mode/ |
D | README.rst | 1 .. zephyr:code-sample:: wifi-ap-sta-mode 2 :name: Wi-Fi AP-STA mode 10 The Wi-Fi AP-STA mode of a Wi-Fi board allows it to function as both 12 This sample demonstrates how to configure and utilize AP-STA mode. 16 1. ``AP mode``: AP mode is configured and enabled. DHCPv4 server is also 18 2. ``STA mode``: Provide the SSID and PSK of you router 20 In this demo, AP-STA mode is enabled using :kconfig:option:`CONFIG_ESP32_WIFI_AP_STA_MODE`. 22 In the sample code, initially, the AP mode is enabled, followed by enabling the STA mode. 23 The driver checks if AP mode was previously enabled. If so, it transitions 24 the board into AP-STA mode to support both modes and attempts to connect to the [all …]
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/Zephyr-latest/dts/bindings/pwm/ |
D | nxp,s32-emios-pwm.yaml | 11 - Channel 0 for mode OPWFMB 12 - Channel 1 for mode OPWMB 13 - Channel 2 for mode OPWMCB with deadtime inserted at leading edge 14 - Channel 3 for mode SAIC, use internal timebase with input filter = 2 eMIOS clock 19 pwm-mode = "OPWFMB"; 29 pwm-mode = "OPWMB"; 38 pwm-mode = "OPWMCB_LEAD_EDGE"; 46 pwm-mode = "SAIC"; 53 phandle 'master-bus'. For OPWMB mode, PWM's period is master bus's period and 54 is 2 * master bus's period - 2 for OPWMCB mode. Please notice that the devicetree [all …]
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