Lines Matching full:mode
11 - Channel 0 for mode OPWFMB
12 - Channel 1 for mode OPWMB
13 - Channel 2 for mode OPWMCB with deadtime inserted at leading edge
14 - Channel 3 for mode SAIC, use internal timebase with input filter = 2 eMIOS clock
19 pwm-mode = "OPWFMB";
29 pwm-mode = "OPWMB";
38 pwm-mode = "OPWMCB_LEAD_EDGE";
46 pwm-mode = "SAIC";
53 phandle 'master-bus'. For OPWMB mode, PWM's period is master bus's period and
54 is 2 * master bus's period - 2 for OPWMCB mode. Please notice that the devicetree
94 is used as a timebase for a channel in SAIC mode, do not use that
97 pwm-mode:
101 Select PWM mode:
103 this mode uses internal counter.
107 an external counter driven in MCB Up Mode. Changing PWM period
113 an external counter driven in MCB Up Down Mode. Changing PWM period
117 - SAIC: single action input capture mode, the eMIOS captures events as soon as
144 of PWM mode depends on period's master bus. Must be in range [2 ... 65535].
148 description: Freeze individual internal counter when the chip enters Debug mode.
169 Dead time (in ticks) for PWM channel in OPWMCB mode.
175 Phase Shift (in ticks) for PWM channel in OPWMB mode.