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/Zephyr-latest/include/zephyr/dt-bindings/sensor/
Dlis2ds12.h17 #define LIS2DS12_DT_ODR_1Hz_LP 1 /* available in LP mode only */
18 #define LIS2DS12_DT_ODR_12Hz5 2 /* available in LP and HR mode */
19 #define LIS2DS12_DT_ODR_25Hz 3 /* available in LP and HR mode */
20 #define LIS2DS12_DT_ODR_50Hz 4 /* available in LP and HR mode */
21 #define LIS2DS12_DT_ODR_100Hz 5 /* available in LP and HR mode */
22 #define LIS2DS12_DT_ODR_200Hz 6 /* available in LP and HR mode */
23 #define LIS2DS12_DT_ODR_400Hz 7 /* available in LP and HR mode */
24 #define LIS2DS12_DT_ODR_800Hz 8 /* available in LP and HR mode */
Dlis2dux12.h22 #define LIS2DUX12_DT_ODR_6Hz 4 /* available in LP and HP mode */
23 #define LIS2DUX12_DT_ODR_12Hz5 5 /* available in LP and HP mode */
24 #define LIS2DUX12_DT_ODR_25Hz 6 /* available in LP and HP mode */
25 #define LIS2DUX12_DT_ODR_50Hz 7 /* available in LP and HP mode */
26 #define LIS2DUX12_DT_ODR_100Hz 8 /* available in LP and HP mode */
27 #define LIS2DUX12_DT_ODR_200Hz 9 /* available in LP and HP mode */
28 #define LIS2DUX12_DT_ODR_400Hz 10 /* available in LP and HP mode */
29 #define LIS2DUX12_DT_ODR_800Hz 11 /* available in LP and HP mode */
/Zephyr-latest/dts/arm/olimex/
Dbb-stm32wl.dtsi24 power-amplifier-output = "rfo-lp";
25 rfo-lp-max-power = <14>;
/Zephyr-latest/drivers/led/
Dlp50xx.c366 static const struct led_info lp##id##_leds_##n[] = { \
370 static const struct lp50xx_config lp##id##_config_##n = { \
375 .max_leds = LP##id##_MAX_LEDS, \
376 .num_leds = ARRAY_SIZE(lp##id##_leds_##n), \
379 .leds_info = lp##id##_leds_##n, \
382 static uint8_t lp##id##_chan_buf_##n[LP50XX_MAX_CHANNELS(nmodules) + 1];\
384 static struct lp50xx_data lp##id##_data_##n = { \
385 .chan_buf = lp##id##_chan_buf_##n, \
393 &lp##id##_data_##n, \
394 &lp##id##_config_##n, \
/Zephyr-latest/dts/bindings/lora/
Dst,stm32wl-subghz-radio.yaml22 - "rfo-lp"
25 rfo-lp-max-power:
/Zephyr-latest/dts/bindings/rtc/
Dnxp,imx-snvs-rtc.yaml7 description: NXP SNVS LP/HP RTC
/Zephyr-latest/dts/bindings/mfd/
Dnxp,lp-flexcomm.yaml7 compatible: "nxp,lp-flexcomm"
/Zephyr-latest/drivers/sensor/st/iis2dh/
DKconfig90 8: 1620 Hz (only LP)
91 9: Depends by mode. LP: 5376 Hz - NORM or HR: 1344 Hz
/Zephyr-latest/dts/bindings/clock/
Drenesas,smartbond-lp-clock.yaml6 compatible: "renesas,smartbond-lp-clk"
Drenesas,smartbond-lp-osc.yaml6 compatible: "renesas,smartbond-lp-osc"
/Zephyr-latest/drivers/mfd/
DKconfig.lpflexcomm11 LP FLexcomm allows enablement of LPUART and LPI2C
/Zephyr-latest/boards/ti/cc1352p7_launchpad/
Dcc1352p7_lp.dts16 compatible = "ti,lp-cc1352p7";
/Zephyr-latest/boards/ti/common/
DKconfig7 bool "CC1352 LP common board antenna init"
/Zephyr-latest/soc/nxp/mcx/mcxn/
DCMakeLists.txt7 # Pass this flag so the SDK I2C, UART and SPI drivers do not init the LP
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Dadsp_shim.h101 #define CAVS_CLKCTL_RLROSCC BIT(29) /* Request LP RING oscillator */
107 #define CAVS_CLKCTL_OCS BIT(2) /* Oscillator clock (0: LP, 1: HP) */
108 #define CAVS_CLKCTL_LMCS BIT(1) /* LP mem divisor (0: div/2, 1: div/4) */
/Zephyr-latest/drivers/timer/
Dsmartbond_timer.c111 * When LP clock is RCX, the watchdog is clocked by RCX clock in sys_clock_set_timeout()
117 * When LP clock is not RCX, the watchdog is clocked by RC32K in sys_clock_set_timeout()
118 * divided by 320. In this case watchdog value to LP clock in sys_clock_set_timeout()
/Zephyr-latest/dts/bindings/mipi-dsi/
Dnxp,imx-mipi-dsi.yaml66 Automatically insert an EoTp short packet when switching from HS to LP mode.
Dnxp,mipi-dsi-2l.yaml65 Automatically insert an EoTp short packet when switching from HS to LP mode.
Dst,stm32-mipi-dsi.yaml90 lp-rx-filter:
/Zephyr-latest/dts/arm/nxp/
Dnxp_mcxn94x_common.dtsi179 compatible = "nxp,lp-flexcomm";
214 compatible = "nxp,lp-flexcomm";
254 compatible = "nxp,lp-flexcomm";
294 compatible = "nxp,lp-flexcomm";
328 compatible = "nxp,lp-flexcomm";
368 compatible = "nxp,lp-flexcomm";
402 compatible = "nxp,lp-flexcomm";
436 compatible = "nxp,lp-flexcomm";
470 compatible = "nxp,lp-flexcomm";
504 compatible = "nxp,lp-flexcomm";
Dnxp_mcxn23x_common.dtsi173 compatible = "nxp,lp-flexcomm";
207 compatible = "nxp,lp-flexcomm";
247 compatible = "nxp,lp-flexcomm";
287 compatible = "nxp,lp-flexcomm";
321 compatible = "nxp,lp-flexcomm";
361 compatible = "nxp,lp-flexcomm";
395 compatible = "nxp,lp-flexcomm";
429 compatible = "nxp,lp-flexcomm";
/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi48 compatible = "renesas,smartbond-lp-osc";
54 compatible = "renesas,smartbond-lp-osc";
61 compatible = "renesas,smartbond-lp-osc";
98 compatible = "renesas,smartbond-lp-clk";
/Zephyr-latest/soc/espressif/esp32c6/
Dmemory.h7 /* LP-SRAM (16kB) memory */
/Zephyr-latest/cmake/compiler/gcc/
Dtarget_riscv.cmake3 set(riscv_mabi "lp")
/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dasm_ldo_management.h47 /* LP SRAM mask */

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