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/Zephyr-latest/soc/st/stm32/stm32u5x/
DKconfig30 The PLL, MSIS, MSIK, HSI16, and HSE oscillators are disabled.
/Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/boards/
Db_u585i_iot02a.overlay8 /* USART Wakeup requires automatic HSI16 switch on in deepsleep mode
Dnucleo_wb55rg.overlay9 /* USART Wakeup requires automatic HSI16 switch on in deepsleep mode
/Zephyr-latest/dts/bindings/clock/
Dst,stm32g0-hsi-clock.yaml10 SYSCLK = HSI16 / HSI DIV
Dst,stm32wba-rcc.yaml133 AHB5 divider. Applies only when SysClock source is HSI16 or HSE32.
/Zephyr-latest/doc/releases/
Dmigration-guide-3.5.rst204 HSI16 as clock source for STM32G0:
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_u5.c440 * For HSI16, epod prescaler is default (div1, not divided).