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/Zephyr-latest/dts/bindings/ethernet/
Dethernet-phy.yaml23 - "10BASE-T Half-Duplex"
24 - "10BASE-T Full-Duplex"
25 - "100BASE-T Half-Duplex"
26 - "100BASE-T Full-Duplex"
27 - "1000BASE-T Half-Duplex"
28 - "1000BASE-T Full-Duplex"
Dmicrochip,enc28j60.yaml20 full-duplex:
23 Optional feature flag - Enables full duplex reception and transmission.
Dnxp,kinetis-ethernet.yaml37 full-duplex:
39 description: The fixed link operates in full duplex mode
/Zephyr-latest/include/zephyr/net/
Dmii.h69 /** full duplex mode */
85 /** 100BASE-X full duplex capable */
87 /** 100BASE-X half duplex capable */
89 /** 10 Mb/s full duplex capable */
91 /** 10 Mb/s half duplex capable */
93 /** 100BASE-T2 full duplex capable */
95 /** 100BASE-T2 half duplex capable */
128 /** try for 100BASE-X full duplex support */
132 /** try for 10 Mb/s full duplex support */
134 /** try for 10 Mb/s half duplex support */
[all …]
Dphy.h33 /** 10Base-T Half-Duplex */
35 /** 10Base-T Full-Duplex */
37 /** 100Base-T Half-Duplex */
39 /** 100Base-T Full-Duplex */
41 /** 1000Base-T Half-Duplex */
43 /** 1000Base-T Full-Duplex */
45 /** 2.5GBase-T Full-Duplex */
47 /** 5GBase-T Full-Duplex */
52 * @brief Check if phy link is full duplex.
56 * @return True if link is full duplex, false if not.
/Zephyr-latest/drivers/ethernet/phy/
Dphy_dm8806_priv.h9 /* 10 Mbit/s transfer with half duplex mask. */
11 /* 10 Mbit/s transfer with full duplex mask. */
13 /* 100 Mbit/s transfer with half duplex mask. */
15 /* 100 Mbit/s transfer with full duplex mask. */
17 /* Duplex mode ability offset. */
28 /* 10 Mbit/s transfer speed with half duplex. */
30 /* 10 Mbit/s transfer speed with full duplex. */
32 /* 100 Mbit/s transfer speed with half duplex. */
34 /* 100 Mbit/s transfer speed with full duplex. */
36 /* Speed and duplex mode status offset. */
[all …]
/Zephyr-latest/dts/bindings/mipi-dbi/
Dmipi-dbi-spi-device.yaml9 duplex:
13 SPI Duplex mode, full or half. By default it's always full duplex thus 0
15 Selecting half duplex allows to use SPI MOSI as a bidirectional line,
/Zephyr-latest/dts/bindings/wifi/
Dinfineon,airoc-wifi-spi.yaml19 spi-half-duplex:
21 Use half-duplex communication; if not present, full-
22 duplex operation is assumed.
/Zephyr-latest/include/zephyr/dt-bindings/spi/
Dspi.h17 * @name SPI duplex mode
20 * Some controllers support half duplex transfer, which results in 3-wire usage.
21 * By default, full duplex will prevail.
/Zephyr-latest/dts/bindings/spi/
Dmicrochip,xec-qmspi-ldma.yaml39 QMSPI data lines 1, 2, or 4. 1 data line is full-duplex
40 MOSI and MISO or half-duplex on MOSI only. Lines set to 2
42 Defaults to 1 for full duplex driver's support for full-duplex spi.
Dspi-device.yaml17 duplex:
21 Duplex mode, full or half. By default it's always full duplex thus 0
Despressif,esp32-spi.yaml17 half-duplex:
20 Enable half-duplex communication mode.
/Zephyr-latest/samples/boards/st/uart/single_wire/
DREADME.rst5 Use single-wire/half-duplex UART functionality of STM32 devices.
10 A simple application demonstrating how to use the single wire / half-duplex UART
/Zephyr-latest/drivers/ethernet/
DKconfig.stm32_hal109 bool "Half duplex mode"
111 Set this if using half duplex when autonegotiation is disabled otherwise
112 duplex mode is full duplex
Dphy_xlnx_gem.c341 * bit [13] = Duplex changed interrupt enable, in phy_xlnx_gem_marvell_alaska_cfg()
364 * Set which link speeds and duplex modes shall be advertised during in phy_xlnx_gem_marvell_alaska_cfg()
412 /* Advertise 1 GBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
415 /* + 100 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
417 /* + 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
421 /* Advertise 100 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
424 /* + 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
428 /* Advertise 10 MBit/s, full duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
433 /* Advertise 1 GBit/s, half duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
436 /* + 100 MBit/s, half duplex */ in phy_xlnx_gem_marvell_alaska_cfg()
[all …]
/Zephyr-latest/dts/bindings/mspi/
Dmspi-controller.yaml31 duplex:
37 Indicate MSPI Duplex mode, full or half.
/Zephyr-latest/dts/bindings/serial/
Despressif,esp32-uart.yaml20 Enable the hardware RS485 half duplex mode.
Dnxp,lpuart.yaml21 Enable the single wire half-duplex communication.
/Zephyr-latest/boards/shields/mikroe_eth_click/
Dmikroe_eth_click.overlay11 full-duplex;
/Zephyr-latest/samples/sensor/ds18b20/boards/
Dnucleo_g0b1re.overlay12 * b) the UART TX pin only, while the single wire half-duplex mode is enabled.
/Zephyr-latest/dts/bindings/w1/
Dzephyr,w1-serial.yaml7 # the option for a "single-wire Half-duplex" mode, where the TX and RX lines
/Zephyr-latest/boards/shields/mikroe_eth_click/boards/
Dlpcxpresso55s69_lpc55s69_cpu0.overlay21 full-duplex;
/Zephyr-latest/dts/arm/xilinx/
Dzynqmp.dtsi128 full-duplex;
155 full-duplex;
182 full-duplex;
209 full-duplex;
/Zephyr-latest/tests/drivers/mspi/api/src/
Dmain.c36 .duplex = DT_ENUM_IDX_OR(MSPI_BUS_NODE, duplex, MSPI_HALF_DUPLEX),
/Zephyr-latest/doc/connectivity/networking/api/
Dethernet.rst28 * Half/full duplex

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