| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.stellaris | 21 This tells the driver to configure the UART port at boot, depending on
22 the additional configure options below.
29 This tells the driver to configure the UART port at boot, depending on
30 the additional configure options below.
37 This tells the driver to configure the UART port at boot, depending on
38 the additional configure options below.
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| D | Kconfig.sifive | 22 This tells the driver to configure the UART port at boot, depending on
23 the additional configure options below.
45 This tells the driver to configure the UART port at boot, depending on
46 the additional configure options below.
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| /Zephyr-latest/samples/shields/npm6001_ek/doc/ |
| D | index.rst | 122 # configure GPIO 0 as output
123 npm6001 gpio configure -p 0 -d out
124 # configure GPIO 0 as output (init high)
125 npm6001 gpio configure -p 0 -d outh
126 # configure GPIO 0 as output (init low)
127 npm6001 gpio configure -p 0 -d outl
128 # configure GPIO 0 as output with high-drive mode enabled
129 npm6001 gpio configure -p 0 -d out --high-drive
130 # configure GPIO 1 as input
131 npm6001 gpio configure -p 1 -d input
[all …]
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| /Zephyr-latest/boards/snps/hsdk/support/ |
| D | openocd.cfg | 5 # Configure JTAG cable
58 $_TARGETNAME2 configure -coreid $_coreid
59 $_TARGETNAME2 configure -dbgbase $_dbgbase
60 $_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
73 $_TARGETNAME3 configure -coreid $_coreid
74 $_TARGETNAME3 configure -dbgbase $_dbgbase
75 $_TARGETNAME3 configure -event reset-assert "arc_common_reset $_TARGETNAME3"
88 $_TARGETNAME4 configure -coreid $_coreid
89 $_TARGETNAME4 configure -dbgbase $_dbgbase
91 $_TARGETNAME4 configure -event reset-assert "arc_hs_reset $_TARGETNAME4"
[all …]
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| D | openocd-2-cores.cfg | 5 # Configure JTAG cable
58 $_TARGETNAME2 configure -coreid $_coreid
59 $_TARGETNAME2 configure -dbgbase $_dbgbase
60 $_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
73 $_TARGETNAME1 configure -coreid $_coreid
74 $_TARGETNAME1 configure -dbgbase $_dbgbase
75 $_TARGETNAME1 configure -event reset-assert "arc_common_reset $_TARGETNAME1"
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| /Zephyr-latest/boards/snps/hsdk4xd/support/ |
| D | openocd.cfg | 5 # Configure JTAG cable
58 $_TARGETNAME2 configure -coreid $_coreid
59 $_TARGETNAME2 configure -dbgbase $_dbgbase
60 $_TARGETNAME2 configure -event reset-assert "arc_common_reset $_TARGETNAME2"
73 $_TARGETNAME3 configure -coreid $_coreid
74 $_TARGETNAME3 configure -dbgbase $_dbgbase
75 $_TARGETNAME3 configure -event reset-assert "arc_common_reset $_TARGETNAME3"
88 $_TARGETNAME4 configure -coreid $_coreid
89 $_TARGETNAME4 configure -dbgbase $_dbgbase
91 $_TARGETNAME4 configure -event reset-assert "arc_hs_reset $_TARGETNAME4"
[all …]
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| /Zephyr-latest/tests/drivers/uart/uart_basic_api/src/ |
| D | test_uart_config.c | 11 * @brief TestPurpose: verify UART configure API settings
14 * - Configure: test_uart_configure( )
15 * - Configure Get: test_uart_config_get( )
17 * -# When test UART CONFIG Configure, the value of configurations actually
21 * -# When test UART CONFIG Configure Get, the app will get/retrieve the
23 * CONFIG Configure
45 /* Verify configure() - set device configuration using data in cfg */ in test_configure()
57 /* test UART configure get (retrieve configuration) */
70 /* Verify configure() - set device configuration using data in cfg */ in test_config_get()
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| D | test_uart_config_wide.c | 11 * @brief TestPurpose: verify UART configure API settings for wide data support
14 * - Configure: test_uart_configure_wide( )
15 * - Configure Get: test_uart_config_get_wide( )
17 * -# When test UART CONFIG Configure, the value of configurations actually
21 * -# When test UART CONFIG Configure Get, the app will get/retrieve the
23 * CONFIG Configure
45 /* Verify configure() - set device configuration using data in cfg */ in test_configure_wide()
57 /* test UART configure get (retrieve configuration) */
70 /* Verify configure() - set device configuration using data in cfg */ in test_config_get_wide()
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| /Zephyr-latest/soc/nxp/imxrt/imxrt118x/ |
| D | soc.c | 181 /* Configure M7 using ARM_PLL_CLK */ in clock_init()
188 /* Configure M33 using SYS_PLL3_CLK */ in clock_init()
194 /* Configure BUS_AON using SYS_PLL2_CLK */ in clock_init()
199 /* Configure BUS_WAKEUP using SYS_PLL2_CLK */ in clock_init()
204 /* Configure WAKEUP_AXI using SYS_PLL3_CLK */ in clock_init()
209 /* Configure SWO_TRACE using SYS_PLL3_DIV2_CLK */ in clock_init()
215 /* Configure M33_SYSTICK using OSC_24M */ in clock_init()
222 /* Configure M7_SYSTICK using OSC_24M */ in clock_init()
231 /* Configure LPUART0102 using SYS_PLL3_DIV2_CLK */ in clock_init()
239 /* Configure LPI2C0102 using SYS_PLL3_DIV2_CLK */ in clock_init()
[all …]
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| /Zephyr-latest/soc/raspberrypi/rpi_pico/rp2040/ |
| D | Kconfig | 30 Configure RP2 to use a W25Q080 flash chip, or similar. Should be selected
36 Configure RP2 to use a flash chip supporting the standard 03h command.
42 Configure RP2 to use a IS25LP080 flash chip, or similar. Should be selected
48 Configure RP2 to use a W25X10CL flash chip, or similar. Should be selected
54 Configure RP2 to use a AT25SF128A flash chip, or similar. Should be selected
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | mspi.h | 191 * @brief MSPI Configure API
192 * @defgroup mspi_configure_api MSPI Configure API
231 /** @brief Configure operation mode */
233 /** @brief Configure duplex mode */
265 /** @brief Configure CE0 or CE1 or more */
267 /** @brief Configure frequency */
269 /** @brief Configure I/O mode */
271 /** @brief Configure data rate */
273 /** @brief Configure clock polarity and phase */
275 /** @brief Configure transfer endian */
[all …]
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| /Zephyr-latest/drivers/lora/ |
| D | Kconfig.rylrxxx | 25 Configure the cmd buffer size
31 Configure the size of message queue
37 …Configure the number of milliseconds before timing out when waiting for acknowledgment from radio …
43 Configure the size of buffers for modem library
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| /Zephyr-latest/drivers/sensor/microchip/mchp_tach_xec/ |
| D | Kconfig | 26 bool "Configure 9 tach edges or 4 tach periods"
29 bool "Configure 5 tach edges or 2 tach periods"
32 bool "Configure 3 tach edges or 1 tach period"
35 bool "Configure 2 tach edges or 1/2 tach period"
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| /Zephyr-latest/boards/sifive/hifive_unleashed/support/ |
| D | openocd_hifive_unleashed.cfg | 20 $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
21 $_TARGETNAME.1 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
22 $_TARGETNAME.2 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
23 $_TARGETNAME.3 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
24 $_TARGETNAME.4 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
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| /Zephyr-latest/boards/sifive/hifive_unmatched/support/ |
| D | openocd_hifive_unmatched.cfg | 20 $_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
21 $_TARGETNAME.1 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
22 $_TARGETNAME.2 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
23 $_TARGETNAME.3 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
24 $_TARGETNAME.4 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1
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| /Zephyr-latest/soc/atmel/sam/common/ |
| D | soc_gpio.c | 29 /* Configure pull-up(s) */ in configure_common_attr()
36 /* Configure pull-down only for MCU series that support it */ in configure_common_attr()
38 /* Configure pull-down(s) */ in configure_common_attr()
46 /* Configure open drain (multi-drive) */ in configure_common_attr()
56 /* Configure input filter */ in configure_input_attr()
78 /* Configure interrupt */ in configure_input_attr()
84 /* Configure additional interrupt mode */ in configure_input_attr()
124 /* Configure pin attributes common to all functions */ in soc_gpio_configure()
169 /* Configure pin attributes related to input function */ in soc_gpio_configure()
171 /* Configure pin as input */ in soc_gpio_configure()
[all …]
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| /Zephyr-latest/boards/st/stm32f7508_dk/support/ |
| D | openocd.cfg | 3 $_TARGETNAME configure -event gdb-attach {
9 $_TARGETNAME configure -event gdb-detach {
17 $_TARGETNAME configure -event reset-start {
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4321a/support/ |
| D | openocd.cfg | 16 $_TARGETNAME configure -event gdb-attach {
22 $_TARGETNAME configure -event gdb-detach {
27 $_TARGETNAME configure -rtos auto
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| /Zephyr-latest/boards/silabs/starter_kits/slstk3701a/support/ |
| D | openocd.cfg | 16 $_TARGETNAME configure -event gdb-attach {
22 $_TARGETNAME configure -event gdb-detach {
27 $_TARGETNAME configure -rtos auto
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| /Zephyr-latest/boards/st/stm32f746g_disco/support/ |
| D | openocd.cfg | 3 $_TARGETNAME configure -event gdb-attach {
9 $_TARGETNAME configure -event gdb-detach {
21 $_TARGETNAME configure -event reset-start {
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | silabs,dbus-pinctrl.yaml | 30 /* Configure PA8 as USART0 TX in GPIO DBUS */
32 /* Configure GPIO to push-pull mode */
39 /* Configure PA9 as USART0 RX in GPIO DBUS */
41 /* Configure GPIO to input mode */
59 - input-disable: Configure GPIO to disabled mode. Setting this property is
63 - input-enable: Configure GPIO to input mode.
64 - drive-push-pull: Configure GPIO to push-pull mode.
65 - drive-open-drain: Configure GPIO to open-drain (wired-AND) mode.
66 - drive-open-source: Configure GPIO to open-source (wired-OR) mode.
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| /Zephyr-latest/tests/subsys/lorawan/channels_mask/src/ |
| D | main.c | 32 /* Configure channels mask with expected parameters */ in ZTEST()
36 /* Configure channels mask with unexpected channels mask size */ in ZTEST()
40 /* Configure channels mask with pointer to NULL */ in ZTEST()
64 /* Configure channels mask with expected parameters */ in ZTEST()
68 /* Configure channels mask with unexpected channels mask size */ in ZTEST()
72 /* Configure channels mask with pointer to NULL */ in ZTEST()
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| /Zephyr-latest/tests/drivers/gpio/gpio_api_1pin/src/ |
| D | test_pin_interrupt.c | 69 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_edge()
78 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_edge()
92 zassert_equal(ret, 0, "Failed to configure pin interrupt"); in test_gpio_pin_interrupt_edge()
143 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_level()
157 zassert_equal(ret, 0, "Failed to configure the pin"); in test_gpio_pin_interrupt_level()
172 zassert_equal(ret, 0, "Failed to configure pin interrupt"); in test_gpio_pin_interrupt_level()
229 TC_PRINT("Step 1: Configure pin as active high\n"); in ZTEST()
231 TC_PRINT("Step 2: Configure pin as active low\n"); in ZTEST()
238 TC_PRINT("Step 1: Configure pin as active high\n"); in ZTEST()
240 TC_PRINT("Step 2: Configure pin as active low\n"); in ZTEST()
[all …]
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| /Zephyr-latest/subsys/net/l2/ppp/ |
| D | Kconfig | 14 int "Maximum timeout in ms for Configure-Req"
18 How long to wait Configure-Req.
21 int "Maximum number of Configure-Req retransmits"
25 How many times to resend Configure-Req messages before deciding the
85 configure at run-time ppp drivers and L2 settings.
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| /Zephyr-latest/soc/infineon/cat1a/psoc6_legacy/ |
| D | soc.c | 123 /* Configure power mode */ in init_cycfg_platform()
129 /* Configure PMIC */ in init_cycfg_platform()
162 /* Configure CPU clock dividers */ in init_cycfg_platform()
175 /* Configure HF clocks */ in init_cycfg_platform()
225 /* Configure Path Clocks */ in init_cycfg_platform()
275 /* Configure and enable FLL */ in init_cycfg_platform()
280 /* Configure and enable PLLs */ in init_cycfg_platform()
327 /* Configure miscellaneous clocks */ in init_cycfg_platform()
344 /* Configure default enabled clocks */ in init_cycfg_platform()
373 /* Configure platform resources */ in Cy_SystemInit()
[all …]
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