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Searched full:bpr (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/dts/bindings/flash_controller/
Dst,stm32-qspi-nor.yaml72 property to indicate that the BPR must be unlocked before write
/Zephyr-latest/dts/bindings/mtd/
Djedec,spi-nor-common.yaml24 property to indicate that the BPR must be unlocked before write
/Zephyr-latest/tests/kernel/interrupt/src/
Dnested_irq.c52 * Minimum legal value of GICC BPR is '3' ie <gggg.ssss>
/Zephyr-latest/include/zephyr/drivers/interrupt_controller/
Dgic.h256 * carefully if PMR and BPR based nesting and preemption has to be done.