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/Zephyr-latest/boards/qemu/cortex_a9/
Dqemu_cortex_a9.dts49 clock-frequency = <50000000>;
55 clock-frequency = <50000000>;
/Zephyr-latest/soc/altr/qemu_nios2/
DKconfig.defconfig7 default 50000000
/Zephyr-latest/boards/digilent/arty_a7/
Darty_a7_designstart_fpga_cortex_m3_defconfig3 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=50000000
/Zephyr-latest/soc/arm/musca/
DKconfig.defconfig6 default 50000000 if SOC_V2M_MUSCA_S1
/Zephyr-latest/boards/gaisler/generic_leon3/
DKconfig.defconfig11 default 50000000
/Zephyr-latest/boards/nxp/twr_kv58f220m/
DKconfig.defconfig9 default 50000000
/Zephyr-latest/boards/silabs/dev_kits/sltb009a/
DKconfig.defconfig7 default 50000000
/Zephyr-latest/soc/gaisler/gr716a/
DKconfig.defconfig13 default 50000000
/Zephyr-latest/soc/altr/zephyr_nios2f/
DKconfig.defconfig7 default 50000000
/Zephyr-latest/soc/altr/zephyr_nios2f/include/
Dsystem.h67 #define ALT_CPU_CPU_FREQ 50000000u
80 #define ALT_CPU_FREQ 50000000
109 #define NIOS2_CPU_FREQ 50000000u
207 #define A_16550_UART_0_FREQ 50000000
274 #define I2C_0_FREQ 50000000
315 #define LED_FREQ 50000000
552 #define TIMER_0_FREQ 50000000
/Zephyr-latest/soc/snps/nsim/arc_classic/hs/
DKconfig.defconfig.hs6x18 default 50000000
/Zephyr-latest/boards/silabs/starter_kits/slstk3701a/
DKconfig.defconfig8 default 50000000
/Zephyr-latest/soc/snps/emsdp/
DKconfig.defconfig.em7d_esp7 default 50000000
DKconfig.defconfig.em47 default 50000000
DKconfig.defconfig.em67 default 50000000
/Zephyr-latest/tests/drivers/sensor/icm42688/boards/
Dnative_sim.overlay9 spi-max-frequency = <50000000>;
/Zephyr-latest/boards/nxp/frdm_k64f/
DKconfig.defconfig9 default 50000000
/Zephyr-latest/soc/infineon/cat1a/psoc6_legacy/
DKconfig.defconfig14 default 50000000
/Zephyr-latest/boards/silabs/radio_boards/slwrb4321a/
DKconfig.defconfig9 default 50000000
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt5xx.dtsi16 peripheral: peripheral@50000000 {
Dnxp_rt6xx.dtsi16 peripheral: peripheral@50000000 {
Dnxp_rw6xx.dtsi17 peripheral: peripheral@50000000 {
/Zephyr-latest/soc/altr/qemu_nios2/include/
Dsystem.h56 #define ALT_CPU_CPU_FREQ 50000000u
68 #define ALT_CPU_FREQ 50000000
128 #define A_16550_UART_0_FREQ 50000000
266 #define TIMER_0_FREQ 50000000
/Zephyr-latest/boards/arm/v2m_musca_s1/
Dv2m_musca_s1.dts80 clock-frequency = <50000000>;
90 peripheral@50000000 {
/Zephyr-latest/tests/drivers/sensor/bmi160/boards/
Dnative_sim.overlay15 spi-max-frequency = <50000000>;

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