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/Zephyr-latest/tests/bsim/bluetooth/ll/edtt/gatt_test_app/src/gatt/
Dservice_a_1.c4 * SPDX-License-Identifier: Apache-2.0
9 * This code is auto-generated from the Excel Workbook
44 '3', '3', '4', '4', '4', '4', '4', '5', '5', '5', '5', '5', '6',
45 '6', '6', '6', '6', '7', '7', '7', '7', '7', '8', '8', '8', '8',
48 '4', '4', '4', '4', '4', '5', '5', '5', '5', '5', '6', '6', '6',
49 '6', '6', '7', '7', '7', '7', '7', '8', '8', '8', '8', '8', '9',
52 '4', '4', '4', '5', '5', '5', '5', '5', '6', '6', '6', '6', '6',
56 '4', '5', '5', '5', '5', '5', '6', '6', '6', '6', '6', '7', '7',
59 '2', '2', '3', '3', '3', '3', '3', '4', '4', '4', '4', '4', '5',
60 '5', '5', '5', '5', '6', '6', '6', '6', '6', '7', '7', '7', '7',
[all …]
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx4/
Dnpcx4-miwus-wui-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* Common Wake-Up Unit Input (WUI) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-miwus-wui-map.dtsi>
10 /* Specific Wake-Up Unit Input (WUI) mapping configurations in npcx4 series */
13 npcx-miwus-wui-map {
14 compatible = "nuvoton,npcx-miwu-wui-map";
18 wui_ioe7: wui0-8-7 {
24 wui_io13: wui1-2-3 {
29 wui_io66: wui1-7-6 {
30 miwus = <&miwu1 6 6>; /* GPIO66 */
[all …]
Dnpcx4-lvol-ctrl-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* Common Low-Voltage level configurations in npcx family */
8 #include <nuvoton/npcx/npcx-lvol-ctrl-map.dtsi>
10 /* Specific Low-Voltage level configurations in npcx4 series */
12 def-lvol-conf-list {
13 compatible = "nuvoton,npcx-lvolctrl-conf";
15 /* Low-Voltage IO Control 1 */
20 /* Low-Voltage IO Control 2 */
22 lvols = <&scfg 2 6>;
25 /* Low-Voltage IO Control 5 */
[all …]
/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx-miwus-wui-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 npcx-miwus-wui-map {
10 compatible = "nuvoton,npcx-miwu-wui-map";
14 wui_io80: wui0-1-0 {
17 wui_io81: wui0-1-1 {
20 wui_io82: wui0-1-2 {
23 wui_io83: wui0-1-3 {
26 wui_io87: wui0-1-7 {
31 wui_io90: wui0-2-0 {
34 wui_io91: wui0-2-1 {
[all …]
/Zephyr-latest/samples/subsys/zbus/priority_boost/
Dsample.yaml10 - "I: 0 -> T1: prio before 5"
11 - "I: 0 ---> L1: T1 prio 5"
12 - "I: 0 ---> L2: T1 prio 5"
13 - "I: 0 -> T1: prio after 5"
14 - "I: 1 -> T1: prio before 5"
15 - "I: 1 ---> L1: T1 prio 5"
16 - "I: 1 ---> L2: T1 prio 5"
17 - "I: 1 -> T1: prio after 5"
18 - "I: 2 -> T1: prio before 5"
19 - "I: 2 ---> L1: T1 prio 5"
[all …]
DREADME.rst1 .. zephyr:code-sample:: zbus-priority-boost
3 :relevant-api: zbus_apis
15 .. code-block:: c
49 .. zephyr-app-commands::
50 :zephyr-app: samples/subsys/zbus/priority_boost
51 :gen-args: -DCONFIG_ZBUS_PRIORITY_BOOST=n
52 :host-os: unix
59 .. code-block:: console
61 I: --------------
62 I: 0 -> T1: prio before 5
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/Zephyr-latest/samples/subsys/nvs/
Dsample.yaml10 - nrf52dk/nrf52832
15 - "Id: 1, Address: 192.168.1.1"
16 - "Id: 2, Key: ff fe fd fc fb fa f9 f8"
17 - "Id: 3, Reboot_counter: (.*)"
18 - "Id: 4, Data: DATA"
19 - "Id: 5, Longarray: 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b \
22 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 \
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-r8a77961.h3 * Copyright (c) 2023-2024 EPAM Systems
5 * SPDX-License-Identifier: Apache-2.0
10 #include "pinctrl-rcar-common.h"
13 #define PIN_NONE -1
19 #define PIN_D5 RCAR_GP_PIN(0, 5)
20 #define PIN_D6 RCAR_GP_PIN(0, 6)
35 #define PIN_A5 RCAR_GP_PIN(1, 5)
36 #define PIN_A6 RCAR_GP_PIN(1, 6)
64 #define PIN_IRQ5 RCAR_GP_PIN(2, 5)
65 #define PIN_PWM0 RCAR_GP_PIN(2, 6)
[all …]
Dpinctrl-r8a77951.h4 * SPDX-License-Identifier: Apache-2.0
9 #include "pinctrl-rcar-common.h"
12 #define PIN_NONE -1
18 #define PIN_D5 RCAR_GP_PIN(0, 5)
19 #define PIN_D6 RCAR_GP_PIN(0, 6)
34 #define PIN_A5 RCAR_GP_PIN(1, 5)
35 #define PIN_A6 RCAR_GP_PIN(1, 6)
63 #define PIN_IRQ5 RCAR_GP_PIN(2, 5)
64 #define PIN_PWM0 RCAR_GP_PIN(2, 6)
78 #define PIN_SD0_DATA3 RCAR_GP_PIN(3, 5)
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/Zephyr-latest/drivers/sensor/st/lsm9ds0_mfd/
Dlsm9ds0_mfd.h1 /* sensor_lsm9ds0_mfd.h - header file for LSM9DS0 accelerometer, magnetometer
8 * SPDX-License-Identifier: Apache-2.0
24 #define LSM9DS0_MFD_MASK_STATUS_REG_M_ZMOR BIT(6)
25 #define LSM9DS0_MFD_SHIFT_STATUS_REG_M_ZMOR 6
26 #define LSM9DS0_MFD_MASK_STATUS_REG_M_YMOR BIT(5)
27 #define LSM9DS0_MFD_SHIFT_STATUS_REG_M_YMOR 5
52 #define LSM9DS0_MFD_MASK_INT_CTRL_REG_M_YMIEN BIT(6)
53 #define LSM9DS0_MFD_SHIFT_INT_CTRL_REG_M_YMIEN 6
54 #define LSM9DS0_MFD_MASK_INT_CTRL_REG_M_ZMIEN BIT(5)
55 #define LSM9DS0_MFD_SHIFT_INT_CTRL_REG_M_ZMIEN 5
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/Zephyr-latest/samples/shields/x_nucleo_53l0a1/src/
Ddisplay_7seg.h7 * SPDX-License-Identifier: Apache-2.0
15 * ---
16 * 1| |5
17 * -2-
18 * 0| |6
19 * ---
25 #define CHAR_0 (BIT(0) | BIT(1) | BIT(3) | BIT(4) | BIT(5) | BIT(6))
26 #define CHAR_1 (BIT(5) | BIT(6))
27 #define CHAR_2 (BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(5))
28 #define CHAR_3 (BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6))
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/Zephyr-latest/tests/net/traffic_class/
Dtestcase.yaml3 - native_sim
4 - native_sim/native/64
6 - native_sim/native/64
8 - net
9 - traffic_class
13 - CONFIG_NET_TC_TX_COUNT=1
14 - CONFIG_NET_TC_RX_COUNT=1
17 - CONFIG_NET_TC_TX_COUNT=2
18 - CONFIG_NET_TC_RX_COUNT=2
21 - CONFIG_NET_TC_TX_COUNT=3
[all …]
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx9/
Dnpcx9-miwus-wui-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 /* Common Wake-Up Unit Input (WUI) mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-miwus-wui-map.dtsi>
10 /* Specific Wake-Up Unit Input (WUI) mapping configurations in npcx9 series */
13 npcx-miwus-wui-map {
14 compatible = "nuvoton,npcx-miwu-wui-map";
18 wui_cr_sin2: wui0-1-6-2 {
19 miwus = <&miwu0 0 6>; /* CR_SIN2 */
23 wui_io66: wui1-7-6 {
24 miwus = <&miwu1 6 6>; /* GPIO66 */
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dnpcm_clock.h4 * SPDX-License-Identifier: Apache-2.0
15 #define NPCM_CLOCK_UART3 (NPCM_CLOCK_GROUP_OFFSET(0) + 5)
16 #define NPCM_CLOCK_UART2 (NPCM_CLOCK_GROUP_OFFSET(0) + 6)
21 #define NPCM_CLOCK_MFT1 (NPCM_CLOCK_GROUP_OFFSET(1) + 5)
22 #define NPCM_CLOCK_MFT2 (NPCM_CLOCK_GROUP_OFFSET(1) + 6)
29 #define NPCM_CLOCK_PWM_F (NPCM_CLOCK_GROUP_OFFSET(2) + 5)
30 #define NPCM_CLOCK_PWM_G (NPCM_CLOCK_GROUP_OFFSET(2) + 6)
37 #define NPCM_CLOCK_SMB6 (NPCM_CLOCK_GROUP_OFFSET(3) + 5)
44 #define NPCM_CLOCK_PECI (NPCM_CLOCK_GROUP_OFFSET(4) + 5)
46 #define NPCM_CLOCK_UART4 (NPCM_CLOCK_GROUP_OFFSET(5) + 0)
[all …]
/Zephyr-latest/drivers/ieee802154/
Dieee802154_rf2xx_regs.h1 /* ieee802154_rf2xx_regs.h - ATMEL RF2XX transceiver registers */
6 * SPDX-License-Identifier: Apache-2.0
12 /*- Definitions ------------------------------------------------------------*/
19 #define RX2XX_FRAME_MIN_PHR_SIZE 5
27 #define RF2XX_RSSI_BPSK_20 -100
28 #define RF2XX_RSSI_BPSK_40 -99
29 #define RF2XX_RSSI_OQPSK_SIN_RC_100 -98
30 #define RF2XX_RSSI_OQPSK_SIN_250 -97
31 #define RF2XX_RSSI_OQPSK_RC_250 -97
33 /*- Types ------------------------------------------------------------------*/
[all …]
/Zephyr-latest/drivers/sensor/st/lsm9ds0_gyro/
Dlsm9ds0_gyro.h1 /* sensor_lsm9ds0_gyro.h - header file for LSM9DS0 gyroscope sensor driver */
6 * SPDX-License-Identifier: Apache-2.0
23 #define LSM9DS0_GYRO_MASK_CTRL_REG1_G_DR (BIT(7) | BIT(6))
24 #define LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_DR 6
25 #define LSM9DS0_GYRO_MASK_CTRL_REG1_G_BW (BIT(5) | BIT(4))
37 #define LSM9DS0_GYRO_MASK_CTRL_REG2_G_HPM (BIT(5) | BIT(4))
45 #define LSM9DS0_GYRO_MASK_CTRL_REG3_G_I1_BOOT BIT(6)
46 #define LSM9DS0_GYRO_SHIFT_CTRL_REG3_G_I1_BOOT 6
47 #define LSM9DS0_GYRO_MASK_CTRL_REG3_G_H_L BIT(5)
48 #define LSM9DS0_GYRO_SHIFT_CTRL_REG3_G_H_L 5
[all …]
/Zephyr-latest/dts/bindings/clock/
Dnuvoton,npcx-pcc.yaml2 # SPDX-License-Identifier: Apache-2.0
8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core
14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */
15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */
16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */
17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */
18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */
21 compatible: "nuvoton,npcx-pcc"
23 include: [clock-controller.yaml, base.yaml]
29 clock-frequency:
[all …]
/Zephyr-latest/dts/arm/infineon/cat3/xmc/
Dxmc4500_F100x1024-intc.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h>
9 port-line-mapping = <
11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */
15 XMC4XXX_INTC_SET_LINE_MAP(2, 4, 6, 0) /* ERU0_ETL0_INPUTB_P2_4 XMC_ERU_ETL_INPUT_B2 */
16 XMC4XXX_INTC_SET_LINE_MAP(3, 1, 5, 0) /* ERU0_ETL0_INPUTB_P3_1 XMC_ERU_ETL_INPUT_B1 */
20 XMC4XXX_INTC_SET_LINE_MAP(2, 2, 6, 1) /* ERU0_ETL1_INPUTB_P2_2 XMC_ERU_ETL_INPUT_B2 */
21 XMC4XXX_INTC_SET_LINE_MAP(2, 6, 7, 1) /* ERU0_ETL1_INPUTB_P2_6 XMC_ERU_ETL_INPUT_B3 */
23 XMC4XXX_INTC_SET_LINE_MAP(1, 5, 0, 2) /* ERU0_ETL2_INPUTA_P1_5 XMC_ERU_ETL_INPUT_A0 */
24 XMC4XXX_INTC_SET_LINE_MAP(0, 12, 6, 2) /* ERU0_ETL2_INPUTB_P0_12 XMC_ERU_ETL_INPUT_B2 */
[all …]
Dxmc4700_F144x2048-intc.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h>
9 port-line-mapping = <
11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */
15 XMC4XXX_INTC_SET_LINE_MAP(2, 4, 6, 0) /* ERU0_ETL0_INPUTB_P2_4 XMC_ERU_ETL_INPUT_B2 */
16 XMC4XXX_INTC_SET_LINE_MAP(3, 1, 5, 0) /* ERU0_ETL0_INPUTB_P3_1 XMC_ERU_ETL_INPUT_B1 */
20 XMC4XXX_INTC_SET_LINE_MAP(2, 2, 6, 1) /* ERU0_ETL1_INPUTB_P2_2 XMC_ERU_ETL_INPUT_B2 */
21 XMC4XXX_INTC_SET_LINE_MAP(2, 6, 7, 1) /* ERU0_ETL1_INPUTB_P2_6 XMC_ERU_ETL_INPUT_B3 */
24 XMC4XXX_INTC_SET_LINE_MAP(1, 5, 0, 2) /* ERU0_ETL2_INPUTA_P1_5 XMC_ERU_ETL_INPUT_A0 */
25 XMC4XXX_INTC_SET_LINE_MAP(0, 12, 6, 2) /* ERU0_ETL2_INPUTB_P0_12 XMC_ERU_ETL_INPUT_B2 */
[all …]
/Zephyr-latest/drivers/sensor/st/lsm6dsl/
Dlsm6dsl.h1 /* sensor_lsm6dsl.h - header file for LSM6DSL accelerometer, gyroscope and
8 * SPDX-License-Identifier: Apache-2.0
31 #define LSM6DSL_MASK_FUNC_CFG_EN_B BIT(5)
32 #define LSM6DSL_SHIFT_FUNC_CFG_EN_B 5
44 #define LSM6DSL_MASK_FIFO_CTRL1_FTH (BIT(7) | BIT(6) | \
45 BIT(5) | BIT(4) | \
53 #define LSM6DSL_MASK_FIFO_CTRL2_TIMER_PEDO_FIFO_DRDY BIT(6)
54 #define LSM6DSL_SHIFT_FIFO_CTRL2_TIMER_PEDO_FIFO_DRDY 6
62 #define LSM6DSL_MASK_FIFO_CTRL3_DEC_FIFO_GYRO (BIT(5) | BIT(4) | \
72 #define LSM6DSL_MASK_FIFO_CTRL4_ONLY_HIGH_DATA BIT(6)
[all …]
/Zephyr-latest/drivers/sensor/st/lsm6ds0/
Dlsm6ds0.h1 /* sensor_lsm6ds0.h - header file for LSM6DS0 accelerometer, gyroscope and
8 * SPDX-License-Identifier: Apache-2.0
21 #define LSM6DS0_MASK_ACT_THS_ACT_THS (BIT(6) | BIT(5) | BIT(4) | \
31 #define LSM6DSO_MASK_INT_GEN_CFG_XL_6D BIT(6)
32 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_6D 6
33 #define LSM6DS0_MASK_INT_GEN_CFG_XL_ZHIE_XL BIT(5)
34 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_ZHIE_XL 5
55 #define LSM6DS0_MASK_INT_CTRL_INT_IG_XL BIT(6)
56 #define LSM6DS0_SHIFT_INT_CTRL_INT_IG_XL 6
57 #define LSM6DS0_MASK_INT_CTRL_INT_FSS5 BIT(5)
[all …]
/Zephyr-latest/samples/subsys/fs/zms/
DREADME.rst1 .. zephyr:code-sample:: zms
3 :relevant-api: zms_high_level_api
40 .. zephyr-app-commands::
41 :zephyr-app: samples/subsys/fs/zms
51 .. code-block:: console
53 *** Booting Zephyr OS build v3.7.0-2383-g624f75400242 ***
72 …5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 2…
73 …4 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 …
91 …5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 2…
92 …4 55 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 73 74 …
/Zephyr-latest/drivers/sensor/st/lps22hb/
Dlps22hb.h1 /* sensor_lps25hb.h - header file for LPS22HB pressure and temperature
8 * SPDX-License-Identifier: Apache-2.0
24 #define LPS22HB_MASK_INTERRUPT_CFG_RESET_ARP BIT(6)
25 #define LPS22HB_SHIFT_INTERRUPT_CFG_RESET_ARP 6
26 #define LPS22HB_MASK_INTERRUPT_CFG_AUTOZERO BIT(5)
27 #define LPS22HB_SHIFT_INTERRUPT_CFG_AUTOZERO 5
43 #define LPS22HB_MASK_CTRL_REG1_ODR (BIT(6) | BIT(5) | BIT(4))
57 #define LPS22HB_MASK_CTRL_REG2_FIFO_EN BIT(6)
58 #define LPS22HB_SHIFT_CTRL_REG2_FIFO_EN 6
59 #define LPS22HB_MASK_CTRL_REG2_STOP_ON_FTH BIT(5)
[all …]
/Zephyr-latest/tests/net/lib/lwm2m/content_senml_cbor/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
22 #define TEST_RES_FLOAT 5
23 #define TEST_RES_BOOL 6
163 /* Leave some space for Content-format option */ in test_prepare_nomem()
165 test_msg.cpkt.offset = sizeof(test_msg.msg_data) - TEST_PAYLOAD_OFFSET; in test_prepare_nomem()
184 (0x04 << 5) | 1, in ZTEST()
185 (0x05 << 5) | 3, in ZTEST()
186 (0x01 << 5) | 1, in ZTEST()
187 (0x03 << 5) | 9, in ZTEST()
188 '/', '6', '5', '5', '3', '5', '/', '0', '/', in ZTEST()
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dambiq-apollo3-pinctrl.h4 * SPDX-License-Identifier: Apache-2.0
23 #define MSPI0_4_P0 APOLLO3_PINMUX(0, 5)
29 #define MSPI0_5_P1 APOLLO3_PINMUX(1, 5)
35 #define MSPI0_6_P2 APOLLO3_PINMUX(2, 5)
41 #define MSPI0_7_P3 APOLLO3_PINMUX(3, 5)
42 #define TRIG1_P3 APOLLO3_PINMUX(3, 6)
48 #define UART1RX_P4 APOLLO3_PINMUX(4, 5)
49 #define CTIM17_P4 APOLLO3_PINMUX(4, 6)
51 #define M0SCL_P5 APOLLO3_PINMUX(5, 0)
52 #define M0SCK_P5 APOLLO3_PINMUX(5, 1)
[all …]

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