| /Zephyr-latest/dts/bindings/gpio/ |
| D | weact,dcmi-camera-connector.yaml | 9 (1) OV_STROBE (Unused) (2) AGND
10 3 DVP_SDA (4) AVDD-2V8
14 (11) 2V8 12 DVP_D7
20 (23) AF-2V8 (24) GND
|
| D | renesas,mipi-header.yaml | 7 The Renesas MIPI lcd display layout provides 2 columns of 13 pins headers
12 2 GND DISP_BLEN 15
18 8 GND 1V8 21
19 9 MIPI_CL_P 1V8 22
|
| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | arm,v8.1m-nvic.yaml | 3 compatible: "arm,v8.1m-nvic"
17 const: 2
|
| /Zephyr-latest/tests/bsim/bluetooth/ll/edtt/gatt_test_app/src/gatt/ |
| D | service_b_5_2.c | 10 * 'GATT_Test_Databases.xlsm' Sheet: 'Large Database 2'
25 * @brief UUID for the Value V8 Characteristic
32 * @brief Attribute read call back for the Value V8 attribute
|
| /Zephyr-latest/dts/arm/ |
| D | armv8.1-m.dtsi | 19 compatible = "arm,v8.1m-nvic";
22 #interrupt-cells = <2>;
|
| /Zephyr-latest/boards/96boards/nitrogen/ |
| D | 96b_lscon.dtsi | 9 compatible = "linaro,96b-lscon-1v8";
10 #gpio-cells = <2>;
13 gpio-map = <23 0 &gpio0 2 0>, /* GPIO-A */
|
| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | ite,it8xxx2-pinctrl.yaml | 35 gpio-voltage = "1v8";
98 - "1v8"
108 low level 1b: 4mA or 2mA
|
| D | nxp,lpc-iocon-pinctrl.yaml | 39 bias-pull-up: IOCON_MODE=2
106 - "1v8"
|
| /Zephyr-latest/arch/arm/core/ |
| D | fatal.c | 30 LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x" in esf_dump()
31 " s[%2d]: 0x%08x s[%2d]: 0x%08x", in esf_dump()
34 i + 2, (uint32_t)esf->fpu.s[i + 2], in esf_dump()
39 LOG_ERR("d[%2d]: 0x%16llx d[%2d]: 0x%16llx" in esf_dump()
40 " d[%2d]: 0x%16llx d[%2d]: 0x%16llx", in esf_dump()
43 i + 2, (uint64_t)esf->fpu.d[i + 2], in esf_dump()
57 LOG_ERR("r10/v7: 0x%08x r11/v8: 0x%08x psp: 0x%08x", in esf_dump()
58 callee->v7, callee->v8, callee->psp); in esf_dump()
|
| D | gdbstub.c | 16 static const int packet_pos[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 41};
64 ctx.registers[R11] = esf->extra_info.callee->v8; in z_gdb_entry()
103 __asm__ volatile("mrc p14, 0, %0, c0, c2, 2" : "=r"(reg_val)::); in arch_gdb_init()
105 __asm__ volatile("mcr p14, 0, %0, c0, c2, 2" ::"r"(reg_val) :); in arch_gdb_init()
|
| /Zephyr-latest/boards/sifive/hifive_unleashed/ |
| D | hifive_unleashed.dtsi | 25 compatible = "linaro,96b-lscon-1v8";
26 #gpio-cells = <2>;
31 <24 0 &gpio0 2 0>, /* GPIO-C */
|
| /Zephyr-latest/arch/sparc/core/ |
| D | trap_table_mvt.S | 8 * This file contains a full SPARC V8 trap table. The processor redirects
70 * Values in the range 0 to 0x5F that are not assigned in SPARC V8
94 INTERRUPT_TRAP(2); ! 12 interrupt_level_2
118 BAD_TRAP; ! 2A division_by_zero
119 BAD_TRAP; ! 2B data_store_error
120 BAD_TRAP; ! 2C data_access_MMU_miss
121 BAD_TRAP; ! 2D reserved
122 BAD_TRAP; ! 2E reserved
123 BAD_TRAP; ! 2F reserved
157 SOFT_TRAP; ! 2 Division by zero
|
| D | fatal.c | 21 * 2: 00000000 40004bf4 40008000 00000003
34 * #2 40003b24 4000a258
76 * The SPARC V8 ABI guarantees that the stack pointer register
98 * Exception trap type (tt) values according to The SPARC V8
185 LOG_ERR(" #%-2d %08x %08x", i, pc, sp); in print_backtrace()
|
| D | window_trap.S | 8 * This file contains standard handlers for the SPARC V8 window overflow and
109 add %g1, 2, %g1
144 * All used windows have been flushed. Set WIM to cause trap for CWP+2.
152 add %g1, 2, %g1
|
| /Zephyr-latest/samples/boards/96boards/argonkey/sensors/ |
| D | README.rst | 58 A USB to TTL 1V8 serial cable may be attached to the low speed connector on
73 <repeats endlessly every 2s>
75 In this example the output is generated polling the sensor every 2 seconds.
|
| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | coredump.c | 10 #define ARCH_HDR_VER 2
86 arch_blk.r.r11 = esf->extra_info.callee->v8; in arch_coredump_info_dump()
|
| /Zephyr-latest/include/zephyr/arch/arm/ |
| D | thread.h | 33 uint32_t v8; /* r11 */ member
90 * +-bits 4-7-----bit-3----------bit-2--------bit-1---+----bit-0------+
105 * Bit 2: Deprecated in favor of FType. Note: FType = !CONTROL.FPCA.
|
| /Zephyr-latest/boards/firefly/roc_rk3568_pc/doc/ |
| D | index.rst | 6 The ROC-RK3568-PC is a Quad-Core 64-Bit Mini Computer, which supports 4G large RAM. M.2
11 RK3568 quad-core 64-bit Cortex-A55 processor, with brand new ARM v8.2-A architecture,
21 - M.2 PCIe 3.0 x 1 (Expand with 2242 / 2280 NVMe SSD)
33 - M.2 PCIe3.0 (Expand with NVMe SSD)
119 I/TC: Secondary CPU 2 initializing
120 I/TC: Secondary CPU 2 switching to normal world boot
124 Secondary CPU core 2 (MPID:0x200) is up
|
| /Zephyr-latest/boards/gaisler/generic_leon3/doc/ |
| D | index.rst | 48 LEON3 SPARC V8 Processor Cobham Gaisler
89 TSIM3 LEON3 SPARC simulator, version 3.0.2 (evaluation version)
96 Number of CPUs: 2
|
| /Zephyr-latest/samples/subsys/smf/smf_calculator/src/ |
| D | main.c | 20 K_MSGQ_DEFINE(output_msgq, CALCULATOR_STRING_LENGTH, 2, 1);
66 [BUTTON_2] = {.label = "2", .event = {.event_id = DIGIT_1_9, .operand = '2'}},
80 * LVGL v8.4 is not thread safe, so use a msgq to pass updates back
162 lv_style_set_shadow_spread(&style_shadow, 2); in setup_display()
|
| /Zephyr-latest/boards/nxp/ls1046ardb/doc/ |
| D | index.rst | 25 - Four 32/64-bit Arm(R) Cortex(R)V8 A72 CPUs, up to 1.6 GHz core speed
38 - Supports SGMII 1G PHYs at Lane 2 and Lane 3
42 - Mini PCIe express x1 (Gen1/2/3)card
43 - Standard PCIe x1 (Gen1/2/3) card
44 - Standard PCIe x1 (Gen1/2/3) card
73 Or for SMP running on 2 CPU Cores (Core2 and Core3):
118 2. SMP mode running on 4 CPU Cores
140 Secondary CPU core 2 (MPID:0x2) is up
146 3. SMP mode running on 2 CPU Cores: Core2 and Core3
160 …tftp c0000000 zephyr.bin; dcache off; dcache flush; icache flush; icache off; cpu 2 release 0xc000…
[all …]
|
| /Zephyr-latest/boards/gaisler/gr716a_mini/doc/ |
| D | index.rst | 10 * SRAM, 2 MiB
13 * 4x MMCX connectors (2 ADC, 2 DAC)
76 LEON3FT SPARC V8 Processor Cobham Gaisler
|
| /Zephyr-latest/boards/adi/max32690evkit/doc/ |
| D | index.rst | 44 - High-Throughput (2Mbps) Mode
139 | | | | 1-2 | | | Connects external voltage reference to VREF pin, m…
146 | | | | 2-1 | | | Connects VDDIO (1V8) to I2C0 pull-up resistors. …
148 | | | | 2-3 | | | Connects VDDIOH (3V3) to I2C0 pull-up resistors. …
155 | | | | 1-2 | | | Connects pull-up to I2C0A_SDA (P2.7) sourced by I2…
162 | | | | 1-2 | | | Connects pull-up to I2C0A_SCL (P2.8) sourced by I2…
169 | | | | 1-2 | | | Connects red LED D1 to P0.14. …
176 | | | | 1-2 | | | Connects green LED D2 to P2.12. …
183 | | | | 1-2 | | | Connects the USB - serial bridge to UART2A_RX (P1…
190 | | | | 1-2 | | | Connects the USB - serial bridge to UART2A_TX (P1…
[all …]
|
| /Zephyr-latest/doc/introduction/ |
| D | index.rst | 19 - NIOS II Gen 2
21 - SPARC V8
|
| /Zephyr-latest/doc/hardware/arch/ |
| D | arm_cortex_m.rst | 23 … | Arm v6-M | Arm v7-M | Arm v8-M | Arm v8.1-M |
174 Stack limit checking (Arm v8-M)
193 Stack overflows trigger the dedicated UsageFault exception provided by Arm v8-M.
415 the stack guard (in certain Arm v8-M configurations with :kconfig:option:`CONFIG_MPU_GAP_FILLING`
416 enabled 2 MPU regions are required to implement the guard feature)
420 * When :kconfig:option:`CONFIG_HW_STACK_PROTECTION` is enabled on Arm v8-M platforms the native
442 …ption to this setting is when :kconfig:option:`CONFIG_MPU_GAP_FILLING` is disabled (Arm v8-M only);
515 In Arm v8-M processors the MPU architecture does not allow programmed MPU regions to
660 … Arm v6-M | Arm v7-M | Arm v8-M | Arm v8.1-M …
|
