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/Zephyr-latest/drivers/sensor/st/lsm6dsl/
DKconfig107 samples per second (Hz).
109 1: 12.5Hz
110 2: 26Hz
111 3: 52Hz
112 4: 104Hz
113 5: 208Hz
114 6: 416Hz
115 7: 833Hz
116 8: 1660Hz
117 9: 3330Hz
[all …]
Dlsm6dsl_shub.c115 LIS3MDL_ODR_BITS(0, 0, 0), /* 0.625 Hz */
116 LIS3MDL_ODR_BITS(0, 1, 0), /* 1.25 Hz */
117 LIS3MDL_ODR_BITS(0, 2, 0), /* 2.5 Hz */
118 LIS3MDL_ODR_BITS(0, 3, 0), /* 5 Hz */
119 LIS3MDL_ODR_BITS(0, 4, 0), /* 10 Hz */
120 LIS3MDL_ODR_BITS(0, 5, 0), /* 20 Hz */
121 LIS3MDL_ODR_BITS(0, 6, 0), /* 40 Hz */
122 LIS3MDL_ODR_BITS(0, 7, 0), /* 80 Hz */
123 LIS3MDL_ODR_BITS(3, 0, 1), /* 155 Hz */
124 LIS3MDL_ODR_BITS(2, 0, 1), /* 300 Hz */
[all …]
/Zephyr-latest/drivers/sensor/adi/adxl372/
DKconfig63 for 6400 Hz ODR, and it is 6.6 ms per code for 3200 Hz ODR and below.
72 of 26 ms inactivity timer for which below threshold acceleration is
73 required to detect inactivity. It is 26 ms per code for 3200 Hz ODR
74 and below, and it is 13 ms per code for 6400 Hz ODR.
/Zephyr-latest/tests/boards/mtk_adsp/src/
Dmain.c30 uint32_t hz = ((uint64_t)cc1 - cc0) * NOM_HZ / (t1 - t0); in cpu_hz() local
32 printk("(measured %u Hz CPU clock vs. %d Hz timer)\n", hz, NOM_HZ); in cpu_hz()
33 return hz; in cpu_hz()
39 int freqs[] = { 26, 370, 540, 720 }; in ZTEST()
48 uint32_t hz0 = 1000000 * freqs[i], hz = cpu_hz(); in ZTEST() local
49 int32_t err = hz0 / abs((int32_t)(hz0 - hz)); in ZTEST()
/Zephyr-latest/dts/bindings/display/
Dnordic,nrf-led-matrix.yaml37 23 24 25 26 27
51 Frequency of refreshing the matrix, in Hz.
/Zephyr-latest/drivers/dai/intel/ssp/
Dssp_regs_v1.h45 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
46 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
72 #define SSCR1_ECRB BIT(26)
111 #define SSPSP_EDMYSTOP(x) DAI_INTEL_SSP_SET_BITS(28, 26, x)
178 #define SSMIDyCS_RNE BIT(26)
194 #define SSMODyCS_TNF BIT(26)
202 /* For 8000 Hz rate one sample is transmitted within 125us */
Dssp_regs_v2.h46 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
47 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
73 #define SSCR1_ECRB BIT(26)
112 #define SSPSP_EDMYSTOP(x) DAI_INTEL_SSP_SET_BITS(28, 26, x)
179 #define SSMIDyCS_RNE BIT(26)
195 #define SSMODyCS_TNF BIT(26)
203 /* For 8000 Hz rate one sample is transmitted within 125us */
Dssp_regs_v3.h53 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
54 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
106 #define SSPSP_EDMYSTOP(x) DAI_INTEL_SSP_SET_BITS(28, 26, x)
177 #define SSMIDyCS_RNE BIT(26)
193 #define SSMODyCS_TNF BIT(26)
201 /* For 8000 Hz rate one sample is transmitted within 125us */
/Zephyr-latest/drivers/timer/
Dmchp_xec_rtos_timer.c38 * frequency of 32768 Hz. The driver is based upon the Intel local APIC
44 * CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=<hz> must be set to 32768.
109 * MEC GIRQ numbers are documented as 8 to 26, check and convert to zero
114 if ((girq < 8) || (girq > 26)) { in girq_src_clr()
123 if ((girq < 8) || (girq > 26)) { in girq_src_en()
132 if ((girq < 8) || (girq > 26)) { in girq_src_dis()
Dmtk_adsp_timer.c27 * running at twice (!!!) the rate: 26MHz. Testing shows they're
54 #define OSTIMER_CON_CLKSRC_32K 0x00 /* 32768 Hz */
55 #define OSTIMER_CON_CLKSRC_26M 0x10 /* 26 MHz */
/Zephyr-latest/boards/nxp/rd_rw612_bga/
Drd_rw612_bga.dtsi56 <7 0 &hsgpio0 26 0>, /* D1 */
210 dc-cutoff = "155hz";
217 dc-cutoff = "155hz";
224 dc-cutoff = "155hz";
231 dc-cutoff = "155hz";
/Zephyr-latest/samples/drivers/counter/maxim_ds3231/
DREADME.rst23 DS3231 on particle_xenon syncclock 1000 Hz
35 1 Hz
107 2019-07-19 06:05:00 Fri 200: adj 0.008000000, uptime 0:05:00.008, clk err 26 ppm
/Zephyr-latest/tests/drivers/build_all/sensor/
Dspi.dtsi186 accel-hz = <800>;
188 gyro-hz = <800>;
219 filter-50hz;
274 accel-hz = "800";
285 gyro-hz = "1000_116";
297 test_spi_adxl367: adxl367@26 {
Di2c.dtsi263 test_i2c_hts221: hts221@26 {
762 accel-hz = "800";
772 gyro-hz = "1000_116";
1068 accel-hz = <800>;
1070 gyro-hz = <800>;
/Zephyr-latest/boards/nxp/mimxrt595_evk/
Dmimxrt595_evk_mimxrt595s_cm33.dts93 <12 0 &gpio4 26 0>, /* D6 */
119 <26 0 &gpio0 30 0>, /* Pin 26, CTP_I2C SDA */
514 dc-cutoff = "155hz";
521 dc-cutoff = "155hz";
/Zephyr-latest/boards/nxp/mimxrt685_evk/
Dmimxrt685_evk_mimxrt685s_cm33.dts71 gpios = <&gpio0 26 0>;
427 dc-cutoff = "155hz";
434 dc-cutoff = "155hz";
/Zephyr-latest/drivers/sdhc/
Dsdhc_cdns_ll.h59 #define CDNS_SRS11_SRDAT BIT(26)
66 * • 1101b - t_sdmclk*2(26+2)
485 /* Max bus freq in Hz */
/Zephyr-latest/include/zephyr/bluetooth/audio/
Daudio.h646 BT_AUDIO_LOCATION_LEFT_SURROUND = BIT(26),
827 * @retval frequency The converted frequency value in Hz.
2212 return "8000 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2214 return "11025 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2216 return "16000 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2218 return "22050 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2220 return "24000 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2222 return "32000 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2224 return "44100 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
2226 return "48000 Hz"; in bt_audio_codec_cap_freq_bit_to_str()
[all …]
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/cm33/
Dsoc.c37 /* Board xtal frequency in Hz */
39 /* Core clock frequency: 198000000Hz */
260 CLOCK_InitAudioPfd(kCLOCK_Pfd0, 26); in rt5xx_clock_init()
/Zephyr-latest/soc/nxp/imxrt/imxrt6xx/cm33/
Dsoc.c41 /* Core clock frequency: 250105263Hz */
224 CLOCK_InitAudioPfd(kCLOCK_Pfd0, 26); in clock_init()
/Zephyr-latest/drivers/sensor/st/lsm6dso/
Dlsm6dso_shub.c405 int tries = 200; /* Should be max ~160 ms, from 2 cycles at slowest ODR 12.5 Hz */ in lsm6dso_shub_wait_completed()
425 /* Enable Accel @26hz */ in lsm6dso_shub_enable()
/Zephyr-latest/doc/kernel/
Dtimeutil.rst19 discontinuities due to `leap seconds <https://what-if.xkcd.com/26/>`__ and
217 between two observations taken at 1 Hz is not equal to the numeric difference
/Zephyr-latest/include/zephyr/xen/public/
Dxen.h126 #define __HYPERVISOR_mmuext_op 26
246 * CPU frequency (Hz):
/Zephyr-latest/drivers/sensor/st/lsm6dso16is/
Dlsm6dso16is_shub.c500 int tries = 200; /* Should be max ~160 ms, from 2 cycles at slowest ODR 12.5 Hz */ in lsm6dso16is_shub_wait_completed()
520 /* Enable Accel @26hz */ in lsm6dso16is_shub_enable()
/Zephyr-latest/drivers/sensor/st/lsm6dsv16x/
Dlsm6dsv16x_shub.c500 int tries = 200; /* Should be max ~160 ms, from 2 cycles at slowest ODR 12.5 Hz */ in lsm6dsv16x_shub_wait_completed()
520 /* Enable Accel @26hz */ in lsm6dsv16x_shub_enable()

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